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/optee_os-3.20.0/ldelf/
A Dstart_rv64.S23 lla a1, reloc_end_rel
24 lw a3, 0(a1)
25 lla a1, reloc_begin_rel
26 lw a2, 0(a1)
27 add a2, a2, a1
28 add a3, a3, a1
31 lla a1, _ldelf_start /* Get the load offset */
44 add t1, a1, t1
47 add t4, t4, a1
/optee_os-3.20.0/lib/libutils/isoc/arch/arm/
A Dsetjmp_a32.S210 str sp, [a1], #4
211 str lr, [a1], #4
217 sfmea f4, 4, [a1]
227 add a1, a1, #48
233 mov a1, #0
251 add a1, a1, #92
262 ldr sp, [a1], #4
263 ldr lr, [a1], #4
269 lfmfd f4, 4, [a1]
274 movs a1, a2
[all …]
/optee_os-3.20.0/core/lib/libtomcrypt/src/pk/asn1/der/sequence/
A Dder_decode_sequence_multi.c36 type = (ltc_asn1_type)va_arg(a1, int); in s_der_decode_sequence_va()
42 size = va_arg(a1, unsigned long); in s_der_decode_sequence_va()
43 data = va_arg(a1, void*); in s_der_decode_sequence_va()
140 va_list a1, a2; in der_decode_sequence_multi() local
145 va_start(a1, inlen); in der_decode_sequence_multi()
148 err = s_der_decode_sequence_va(in, inlen, a1, a2, LTC_DER_SEQ_SEQUENCE | LTC_DER_SEQ_RELAXED); in der_decode_sequence_multi()
151 va_end(a1); in der_decode_sequence_multi()
166 va_list a1, a2; in der_decode_sequence_multi_ex() local
171 va_start(a1, flags); in der_decode_sequence_multi_ex()
174 err = s_der_decode_sequence_va(in, inlen, a1, a2, flags); in der_decode_sequence_multi_ex()
[all …]
/optee_os-3.20.0/core/arch/arm/tee/
A Dentry_fast.c22 args->a1 = default_nsec_shm_paddr; in tee_entry_get_shm_config()
35 switch (args->a1) { in tee_entry_fastcall_l2cc_mutex()
90 args->a1 = 0; in tee_entry_exchange_capabilities()
117 args->a1 |= OPTEE_SMC_SEC_CAP_RPC_ARG; in tee_entry_exchange_capabilities()
136 args->a1 = cookie >> 32; in tee_entry_disable_shm_cache()
163 args->a1 = CFG_NUM_THREADS; in tee_entry_get_thread_count()
169 uint16_t guest_id = args->a1; in tee_entry_vm_created()
185 uint16_t guest_id = args->a1; in tee_entry_vm_destroyed()
323 args->a1 = OPTEE_MSG_UID_1; in tee_entry_get_api_uuid()
331 args->a1 = OPTEE_MSG_REVISION_MINOR; in tee_entry_get_api_revision()
[all …]
/optee_os-3.20.0/core/arch/riscv/include/
A Driscv_macros.S13 mv a1, \reg_op1
17 andi a3, a1, 1
21 srli a1, a1, 1
23 bnez a1, 1b
/optee_os-3.20.0/core/arch/arm/sm/
A Dpsci.c143 uint32_t a1 = args->a1; in tee_psci_handler() local
152 args->a0 = psci_cpu_suspend(a1, a2, a3, nsec); in tee_psci_handler()
158 args->a0 = psci_cpu_on(a1, a2, a3); in tee_psci_handler()
161 args->a0 = psci_affinity_info(a1, a2); in tee_psci_handler()
164 args->a0 = psci_migrate(a1); in tee_psci_handler()
183 args->a0 = psci_features(a1); in tee_psci_handler()
186 args->a0 = psci_system_reset2(a1, a2); in tee_psci_handler()
189 args->a0 = psci_mem_protect(a1); in tee_psci_handler()
192 args->a0 = psci_mem_chk_range(a1, a2); in tee_psci_handler()
195 args->a0 = psci_node_hw_state(a1, a2); in tee_psci_handler()
[all …]
A Dstd_smc.c60 args->a1 = (uuid.timeHiAndVersion << 16) | uuid.timeMid; in smc_std_handler()
72 args->a1 = STD_SVC_VERSION_MINOR; in smc_std_handler()
/optee_os-3.20.0/lib/libutils/isoc/newlib/
A Dstrcmp.c106 unsigned long *a1;
114 a1 = (unsigned long *)s1;
116 while (*a1 == *a2) {
121 if (DETECTNULL(*a1))
124 a1++;
132 s1 = (char *)a1;
A Dstrncmp.c115 unsigned long *a1;
125 a1 = (unsigned long*)s1;
127 while (n >= sizeof (long) && *a1 == *a2)
133 if (n == 0 || DETECTNULL (*a1))
136 a1++;
141 s1 = (char*)a1;
A Dmemcmp.c100 unsigned long *a1;
111 a1 = (unsigned long *)s1;
114 if (*a1 != *a2)
116 a1++;
123 s1 = (unsigned char *)a1;
/optee_os-3.20.0/core/arch/arm/plat-ti/
A Dsm_platform_handler_a9.c38 io_write32(pl310_base() + PL310_DEBUG_CTRL, smc_args->a1); in ti_sip_handler()
42 arm_cl2_cleaninvbypa(pl310_base(), smc_args->a1, in ti_sip_handler()
43 smc_args->a1 + smc_args->a2); in ti_sip_handler()
47 io_write32(pl310_base() + PL310_CTRL, smc_args->a1); in ti_sip_handler()
51 io_write32(pl310_base() + PL310_AUX_CTRL, smc_args->a1); in ti_sip_handler()
55 io_write32(pl310_base() + PL310_TAG_RAM_CTRL, smc_args->a1); in ti_sip_handler()
60 io_write32(pl310_base() + PL310_PREFETCH_CTRL, smc_args->a1); in ti_sip_handler()
A Dsm_platform_handler_a15.c47 write_actlr(smc_args->a1); in ti_sip_handler()
52 write_cntfrq(smc_args->a1); in ti_sip_handler()
57 write_wugen_mpu_amba_if_mode(smc_args->a1); in ti_sip_handler()
/optee_os-3.20.0/core/arch/riscv/kernel/
A Dsbi.c16 register unsigned long a1 asm("a1") = (unsigned long)arg1; \
24 : "+r" (a0), "+r" (a1) \
27 (struct sbiret){ .error = a0, .value = a1 }; \
/optee_os-3.20.0/core/arch/riscv/include/kernel/
A Dthread_arch.h38 unsigned long a1; /* Parameter */ member
56 unsigned long a1; member
73 unsigned long a1; member
96 unsigned long a1; member
/optee_os-3.20.0/core/arch/arm/include/kernel/
A Dthread_private_arch.h126 void thread_std_smc_entry(uint32_t a0, uint32_t a1, uint32_t a2, uint32_t a3,
128 uint32_t __thread_std_smc_entry(uint32_t a0, uint32_t a1, uint32_t a2,
188 void thread_alloc_and_run(uint32_t a0, uint32_t a1, uint32_t a2, uint32_t a3,
190 void thread_resume_from_rpc(uint32_t thread_id, uint32_t a0, uint32_t a1,
234 uint32_t thread_handle_std_smc(uint32_t a0, uint32_t a1, uint32_t a2,
A Dthread_arch.h92 uint32_t a1; /* Parameter */ member
104 uint64_t a1; /* Parameter */ member
285 unsigned long thread_cpu_off_handler(unsigned long a0, unsigned long a1);
286 unsigned long thread_cpu_suspend_handler(unsigned long a0, unsigned long a1);
287 unsigned long thread_cpu_resume_handler(unsigned long a0, unsigned long a1);
288 unsigned long thread_system_off_handler(unsigned long a0, unsigned long a1);
289 unsigned long thread_system_reset_handler(unsigned long a0, unsigned long a1);
452 unsigned long thread_smc(unsigned long func_id, unsigned long a1,
/optee_os-3.20.0/core/drivers/
A Dsmccc_trng.c81 args.a1 = ARM_SMCCC_TRNG_RND_64; in smccc_trng_is_supported()
90 args.a1 = ARM_SMCCC_TRNG_RND_32; in smccc_trng_is_supported()
126 read_bytes(args->a1, byte_count, &ptr, &rem); in read_samples()
148 args.a1 = burst * 8; in smccc_trng_read()
188 major, minor, (unsigned long)args.a0, (unsigned long)args.a1 >> 16, in smccc_trng_print_info()
189 (unsigned long)args.a1 & GENMASK_32(16, 0), in smccc_trng_print_info()
/optee_os-3.20.0/core/arch/arm/kernel/
A Dthread.c174 thread->regs.r1 = a1; in init_regs()
205 thread->regs.x[1] = a1; in init_regs()
290 regs->r1 = a1; in copy_a0_to_a3()
305 regs->x[1] = a1; in copy_a0_to_a3()
956 regs->r1 = a1; in set_ctx_regs()
965 regs->x[1] = a1; in set_ctx_regs()
1130 unsigned long a1 __unused) in thread_cpu_off_handler()
1137 unsigned long a1 __unused) in thread_cpu_suspend_handler()
1144 unsigned long a1 __unused) in thread_cpu_resume_handler()
1151 unsigned long a1 __unused) in thread_system_off_handler()
[all …]
/optee_os-3.20.0/lib/libutils/isoc/arch/riscv/
A Dsetjmp_rv.S51 STR a1, REGOFF(1)(sp)
56 LDR a1, REGOFF(1)(sp)
74 seqz a0, a1
75 add a0, a0, a1
/optee_os-3.20.0/core/arch/arm/plat-rzn1/
A Dsm_platform_handler.c74 args->a0 = oem_sysreg(args->a1, args->a2, &args->a3); in oem_service()
75 args->a1 = args->a3; in oem_service()
78 console_putc(args->a1); in oem_service()
/optee_os-3.20.0/core/arch/arm/plat-stm32mp1/nsec-service/
A Dstm32mp1_svc_setup.c25 args->a1 = STM32_SIP_SVC_VERSION_MINOR; in sip_service()
29 args->a1 = STM32_SIP_SVC_UID_1; in sip_service()
A Dbsec_svc.c17 uint32_t cmd = args->a1; in bsec_main()
20 uint32_t *out_value = &args->a1; in bsec_main()
/optee_os-3.20.0/core/include/kernel/
A Dboot.h55 unsigned long cpu_on_handler(unsigned long a0, unsigned long a1);
56 unsigned long boot_cpu_on_handler(unsigned long a0, unsigned long a1);
/optee_os-3.20.0/core/arch/arm/include/sm/
A Dsm.h132 void vector_std_smc_entry(uint32_t a0, uint32_t a1, uint32_t a2, uint32_t a3,
134 void vector_fast_smc_entry(uint32_t a0, uint32_t a1, uint32_t a2, uint32_t a3,
136 void vector_fiq_entry(uint32_t a0, uint32_t a1, uint32_t a2, uint32_t a3,
/optee_os-3.20.0/core/drivers/wdt/
A Dwatchdog_sm.c31 switch (args->a1) { in __wdt_sm_handler()
41 args->a1 = wdt_min_timeout; in __wdt_sm_handler()

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