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123

/optee_os-3.20.0/core/arch/arm/sm/
A Dsm_a32.S116 add r0, sp, #SM_CTX_SEC
124 add r8, sp, #(SM_CTX_SEC + SM_SEC_CTX_R0)
132 add r0, sp, #SM_CTX_NSEC
166 add sp, sp, #(SM_CTX_NSEC + SM_NSEC_CTX_R0)
192 add sp, sp, #(SM_CTX_SEC + SM_SEC_CTX_R0)
230 add r0, sp, #SM_CTX_NSEC
240 add r0, sp, #SM_CTX_SEC
271 add sp, sp, #1 /* 7:111 Reset */
275 add sp, sp, #1 /* 3:011 Data abort */
276 add sp, sp, #1 /* 2:010 Reserved */
[all …]
A Dpm_a32.S33 add r0, sp, #8
40 add sp, sp, #SM_PM_CTX_SIZE
101 add r0, r0, r1
114 add r4, r4, r5
/optee_os-3.20.0/ldelf/
A Dstart_rv64.S27 add a2, a2, a1
28 add a3, a3, a1
44 add t1, a1, t1
46 add t4, t4, t3
47 add t4, t4, a1
A Dstart_a32.S27 add r5, r5, r4
28 add r6, r6, r4
42 add r7, r7, r4
44 add r8, r8, r4
A Dstart_a64.S27 add x5, x5, x4
28 add x6, x6, x4
46 add x7, x7, x4
47 add x9, x9, x4
/optee_os-3.20.0/lib/libmbedtls/mbedtls/include/mbedtls/
A Dccm.h163 const unsigned char *add, size_t add_len,
211 const unsigned char *add, size_t add_len,
248 const unsigned char *add, size_t add_len,
293 const unsigned char *add, size_t add_len,
A Dgcm.h176 const unsigned char *add,
220 const unsigned char *add,
248 const unsigned char *add,
/optee_os-3.20.0/core/arch/arm/kernel/
A Dcache_helpers_a64.S30 add x1, x0, x1
35 add x0, x0, x2
104 add x14, x14, x0, lsl #5 // inner loop is 8x32-bit instructions
105 BTI( add x14, x14, x0, lsl #2) // inner loop is + "bti j" instruction
109 add x2, x10, x10, lsr #1 // work out 3x current cache level
119 add x2, x2, #4 // add 4 (line length offset)
148 add x10, x10, #2 // increment cache number
228 add x1, x0, x1
233 add x0, x0, x2
A Dcache_helpers_a32.S35 add r1, r0, r1
40 add r0, r0, r2
112 add r6, r11, r0, lsl #3 // cache op is 2x32-bit instructions
114 add r10, r1, r1, LSR #1 // Work out 3x current cache level
124 add r10, r10, #4 // add 4 (r10 = line length offset)
142 add r1, r1, #2 // increment the cache number
252 add r1, r0, r1
257 add r0, r0, r2
A Dmisc_a64.S39 add x0, x0, x1, LSL #(CFG_CORE_CLUSTER_SHIFT)
48 add x1, x1, x2, LSL #(CFG_CORE_CLUSTER_SHIFT)
49 add x0, x0, x1, LSL #(CFG_CORE_THREAD_SHIFT)
A Dentry_a64.S30 add x0, x0, #1
38 add x0, x0, x2
41 add sp, x1, x0
209 add x0, x0, x2
210 add x1, x1, x2
300 add x6, x6, x0
453 add x4, x4, x1
455 add x5, x5, x0
513 add x1, x1, x6
530 add sp, sp, x6
[all …]
A Dentry_a32.S122 add r0, r0, #4
281 add r0, r0, #1
286 add r2, r2, r3
309 add sp, r1, r2
407 add r0, r0, r2
408 add r1, r1, r2
461 add r0, r0, r2
464 add r1, r1, r2
524 add r2, r2, r0
708 add r5, r5, r0
[all …]
A Dmisc_a32.S42 add r0, r0, r1, LSL #(CFG_CORE_CLUSTER_SHIFT)
51 add r1, r1, r2, LSL #(CFG_CORE_CLUSTER_SHIFT)
52 add r0, r0, r1, LSL #(CFG_CORE_THREAD_SHIFT)
A Dthread_a32.S412 add r1, r1, r0
589 add sp, sp, #1 /* 7:111 Reset */
592 add sp, sp, #1 /* 4:100 Prefetch abort */
593 add sp, sp, #1 /* 3:011 Data abort */
594 add sp, sp, #1 /* 2:010 Reserved */
595 add sp, sp, #1 /* 1:001 IRQ */
636 add pc, pc, r0, LSL #3
835 add r0, r0, #CORE_MMU_BASE_TABLE_OFFSET
897 add r2, r6, #CORE_MMU_BASE_TABLE_OFFSET
926 add r1, r0, r1
[all …]
/optee_os-3.20.0/core/arch/arm/plat-d06/
A Dcore_pos_a64.S34 add x5, x5, x4
41 add x5, x5, x3
43 add x5, x5, x2
/optee_os-3.20.0/lib/libmbedtls/mbedtls/library/
A Dccm.c150 const unsigned char *add, size_t add_len, in ccm_auth_crypt() argument
221 src = add; in ccm_auth_crypt()
321 const unsigned char *add, size_t add_len, in mbedtls_ccm_star_encrypt_and_tag() argument
327 CCM_VALIDATE_RET( add_len == 0 || add != NULL ); in mbedtls_ccm_star_encrypt_and_tag()
337 const unsigned char *add, size_t add_len, in mbedtls_ccm_encrypt_and_tag() argument
343 CCM_VALIDATE_RET( add_len == 0 || add != NULL ); in mbedtls_ccm_encrypt_and_tag()
359 const unsigned char *add, size_t add_len, in mbedtls_ccm_star_auth_decrypt() argument
370 CCM_VALIDATE_RET( add_len == 0 || add != NULL ); in mbedtls_ccm_star_auth_decrypt()
376 iv, iv_len, add, add_len, in mbedtls_ccm_star_auth_decrypt()
397 const unsigned char *add, size_t add_len, in mbedtls_ccm_auth_decrypt() argument
[all …]
/optee_os-3.20.0/core/arch/arm/crypto/
A Dsha512_armv8a_ce_a64.S85 add v5.2d, v\rc0\().2d, v\in0\().2d
89 add v\i3\().2d, v\i3\().2d, v5.2d
98 add v\i4\().2d, v\i1\().2d, v\i3\().2d
190 add v8.2d, v8.2d, v0.2d
191 add v9.2d, v9.2d, v1.2d
192 add v10.2d, v10.2d, v2.2d
193 add v11.2d, v11.2d, v3.2d
A Dsha256_armv8a_ce_a64.S31 add t1.4s, v\s0\().4s, \rc\().4s
36 add t0.4s, v\s0\().4s, \rc\().4s
76 1: add t0.4s, v16.4s, v0.4s
101 add dgav.4s, dgav.4s, dg0v.4s
102 add dgbv.4s, dgbv.4s, dg1v.4s
A Dsha1_armv8a_ce_a64.S35 add t1.4s, v\s0\().4s, \rc\().4s
44 add t0.4s, v\s0\().4s, \rc\().4s
81 1: add t0.4s, v8.4s, k0.4s
109 add dgbv.2s, dgbv.2s, dg1v.2s
110 add dgav.4s, dgav.4s, dg0v.4s
/optee_os-3.20.0/core/arch/riscv/include/
A Driscv_macros.S19 add a0, a0, a2
24 add \reg_res, \reg_res, a0
/optee_os-3.20.0/core/arch/riscv/
A Driscv.mk166 ta-mk-file-export-add-ta_rv32 += CROSS_COMPILE ?= riscv32-unknown-linux-gnu-_nl_
167 ta-mk-file-export-add-ta_rv32 += CROSS_COMPILE32 ?= $$(CROSS_COMPILE)_nl_
168 ta-mk-file-export-add-ta_rv32 += CROSS_COMPILE_ta_rv32 ?= $$(CROSS_COMPILE32)_nl_
169 ta-mk-file-export-add-ta_rv32 += COMPILER ?= gcc_nl_
170 ta-mk-file-export-add-ta_rv32 += COMPILER_ta_rv32 ?= $$(COMPILER)_nl_
171 ta-mk-file-export-add-ta_rv32 += PYTHON3 ?= python3_nl_
203 ta-mk-file-export-add-ta_rv64 += CROSS_COMPILE64 ?= $$(CROSS_COMPILE)_nl_
204 ta-mk-file-export-add-ta_rv64 += CROSS_COMPILE_ta_rv64 ?= $$(CROSS_COMPILE64)_nl_
205 ta-mk-file-export-add-ta_rv64 += COMPILER ?= gcc_nl_
206 ta-mk-file-export-add-ta_rv64 += COMPILER_ta_rv64 ?= $$(COMPILER)_nl_
[all …]
/optee_os-3.20.0/core/arch/arm/plat-ti/
A Da9_plat_init.S59 add r0, r0, #1
68 add sp, r1, r0
/optee_os-3.20.0/lib/libutils/ext/arch/arm/
A Dmcount_a64.S27 add \reg, \reg, #8
77 add sp, sp, #64
/optee_os-3.20.0/core/arch/arm/tee/
A Darch_svc_a64.S64 add x0, x0, #0xf
75 add x2, xzr, x6, lsl #2
146 add sp, sp, #SC_REC_SIZE
/optee_os-3.20.0/lib/libutee/arch/arm/
A Dutee_syscalls_a32.S24 add fp, ip, #16
42 add r5, sp, #(4 * 4)

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