Searched refs:c0 (Results 1 – 5 of 5) sorted by relevance
| /optee_os-3.20.0/core/arch/arm/kernel/ |
| A D | arm32_sysreg.txt | 12 AIDR c0 1 c0 7 RO IMPLEMENTATION DEFINED Auxiliary ID Register
13 CCSIDR c0 1 c0 0 RO Cache Size ID Registers
14 CLIDR c0 1 c0 1 RO Cache Level ID Register
15 CSSELR c0 2 c0 0 RW Cache Size Selection Register
16 CTR c0 0 c0 1 RO Cache Type Register
18 ID_DFR0 c0 0 c1 2 RO Debug Feature Register 0
31 MIDR c0 0 c0 0 RO Main ID Register
32 MPIDR c0 0 c0 5 RO Multiprocessor Affinity Register
33 REVIDR c0 0 c0 6 RO Revision ID Register
34 TCMTR c0 0 c0 2 RO TCM Type Register
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| /optee_os-3.20.0/core/arch/arm/include/ |
| A D | arm32_macros_cortex_a9.S | 32 mcr p15, 0, \reg, c15, c0, 0
36 mrc p15, 0, \reg, c15, c0, 0
40 mcr p15, 0, \reg, c15, c0, 1
44 mrc p15, 0, \reg, c15, c0, 1
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| /optee_os-3.20.0/core/arch/arm/plat-hisilicon/ |
| A D | hi3519av100_plat_init.S | 56 mrc p15, 4, r2, c1, c0, 1
58 mcr p15, 4, r2, c1, c0, 1
65 mrc p15, 0, r2, c1, c0, 1
67 mcr p15, 0, r2, c1, c0, 1
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| /optee_os-3.20.0/lib/libutils/ext/include/ |
| A D | fault_mitigation.h | 195 #define __ftmn_step_count_1(c0) ((c0) * FTMN_INCR0) argument
196 #define __ftmn_step_count_2(c0, c1) \ argument
197 (__ftmn_step_count_1(c0) + (c1) * FTMN_INCR1)
198 #define __ftmn_step_count_3(c0, c1, c2) \ argument
199 (__ftmn_step_count_2(c0, c1) + (c2) * FTMN_INCR2)
200 #define __ftmn_step_count_4(c0, c1, c2, c3) \ argument
201 (__ftmn_step_count_3(c0, c1, c2) + (c3) * FTMN_INCR3)
202 #define __ftmn_step_count_5(c0, c1, c2, c3, c4) \ argument
203 (__ftmn_step_count_4(c0, c1, c2, c3) + (c4) * FTMN_INCR4)
204 #define __ftmn_step_count_6(c0, c1, c2, c3, c4, c5) \ argument
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| /optee_os-3.20.0/lib/libutee/arch/arm/ |
| A D | arm32_user_sysreg.txt | 12 CNTFRQ c14 0 c0 0 RW Counter Frequency register
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