1 /* SPDX-License-Identifier: BSD-2-Clause */
2 /*
3  * Copyright 2022-2023 NXP
4  */
5 
6 #ifndef __KERNEL_CLINT_H
7 #define __KERNEL_CLINT_H
8 
9 #include <io.h>
10 #include <kernel/misc.h>
11 #include <platform_config.h>
12 #include <types_ext.h>
13 
14 #ifdef CFG_RISCV_M_MODE
15 
16 /* Machine software-interrupt pending register for a specific hart */
17 #define CLINT_MSIP(hart) (CLINT_BASE + (4 * (hart)))
18 /* Register for setting mtimecmp for a specific hart */
19 #define CLINT_MTIMECMP(hart)(CLINT_BASE + 0x4000 + (8 * (hart)))
20 /* Number of cycles counted from the RTCCLK input */
21 #define CLINT_MTIME (CLINT_BASE + 0xbff8)
22 
clint_ipi_send(unsigned long hart)23 static inline void clint_ipi_send(unsigned long hart)
24 {
25 	assert(hart < CFG_TEE_CORE_NB_CORE);
26 	io_write32(CLINT_MSIP(hart), 1);
27 }
28 
clint_ipi_clear(unsigned long hart)29 static inline void clint_ipi_clear(unsigned long hart)
30 {
31 	assert(hart < CFG_TEE_CORE_NB_CORE);
32 	io_write32(CLINT_MSIP(hart), 0);
33 }
34 
clint_set_mtimecmp(uint64_t timecmp)35 static inline void clint_set_mtimecmp(uint64_t timecmp)
36 {
37 	/* Each hart has a separate source of timer interrupts */
38 	io_write64(CLINT_MTIMECMP(get_core_pos()), timecmp);
39 }
40 
clint_get_mtimecmp(void)41 static inline uint64_t clint_get_mtimecmp(void)
42 {
43 	return io_read64(CLINT_MTIMECMP(get_core_pos()));
44 }
45 
clint_get_mtime(void)46 static inline uint64_t clint_get_mtime(void)
47 {
48 	return io_read64(CLINT_MTIME);
49 }
50 
clint_set_mtime(uint64_t mtime)51 static inline void clint_set_mtime(uint64_t mtime)
52 {
53 	io_write64(CLINT_MTIME, mtime);
54 }
55 
56 #endif /* CFG_RISCV_M_MODE */
57 #endif /* __KERNEL_CLINT_H */
58