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Searched refs:divider (Results 1 – 3 of 3) sorted by relevance

/optee_os-3.20.0/core/drivers/clk/
A Dclk-stm32-core.c255 const struct div_cfg *divider = &priv->div[div_id]; in stm32_div_get_value() local
258 val = io_read32(priv->base + divider->offset) >> divider->shift; in stm32_div_get_value()
259 val &= MASK_WIDTH_SHIFT(divider->width, 0); in stm32_div_get_value()
267 const struct div_cfg *divider = NULL; in stm32_div_set_value() local
274 divider = &priv->div[div_id]; in stm32_div_set_value()
275 address = priv->base + divider->offset; in stm32_div_set_value()
277 mask = MASK_WIDTH_SHIFT(divider->width, divider->shift); in stm32_div_set_value()
280 if (divider->ready == DIV_NO_RDY) in stm32_div_set_value()
289 const struct div_cfg *divider = &priv->div[div_id]; in stm32_div_get_rate() local
293 div = _get_div(divider->table, val, divider->flags, divider->width); in stm32_div_get_rate()
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/optee_os-3.20.0/core/drivers/
A Dimx_i2c.c177 uint32_t divider; member
201 if (div < p->divider) in i2c_set_prescaler()
203 else if (div > q->divider) in i2c_set_prescaler()
207 if (div <= p->divider) in i2c_set_prescaler()
/optee_os-3.20.0/core/arch/arm/dts/
A Dstm32mp15xx-dhcom-som.dtsi458 * so that MCO2 behaves as a divider for the ETHRX clock here.

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