Searched refs:gate (Results 1 – 3 of 3) sorted by relevance
68 const struct gate_cfg *gate = &priv->gates[gate_id]; in stm32_gate_endisable() local69 uintptr_t addr = priv->base + gate->offset; in stm32_gate_endisable()72 if (gate->set_clr) in stm32_gate_endisable()73 io_write32(addr, BIT(gate->bit_idx)); in stm32_gate_endisable()77 if (gate->set_clr) in stm32_gate_endisable()79 BIT(gate->bit_idx)); in stm32_gate_endisable()98 const struct gate_cfg *gate = &priv->gates[gate_id]; in stm32_gate_is_enabled() local99 uintptr_t addr = priv->base + gate->offset; in stm32_gate_is_enabled()108 uintptr_t address = priv->base + gate->offset; in stm32_gate_wait_ready()109 uint32_t mask_rdy = BIT(gate->bit_idx); in stm32_gate_wait_ready()[all …]
953 static void __clk_enable(const struct stm32mp1_clk_gate *gate) in __clk_enable() argument956 uint32_t bit = BIT(gate->bit); in __clk_enable()958 if (gate->set_clr) in __clk_enable()959 io_write32(base + gate->offset, bit); in __clk_enable()961 io_setbits32_stm32shregs(base + gate->offset, bit); in __clk_enable()963 FMSG("Clock %u has been enabled", gate->clock_id); in __clk_enable()969 uint32_t bit = BIT(gate->bit); in __clk_disable()971 if (gate->set_clr) in __clk_disable()972 io_write32(base + gate->offset + RCC_MP_ENCLRR_OFFSET, bit); in __clk_disable()974 io_clrbits32_stm32shregs(base + gate->offset, bit); in __clk_disable()[all …]
942 int gate = -1; in stm32_clk_configure_clk() local949 gate = GATE_MCO1; in stm32_clk_configure_clk()954 gate = GATE_MCO2; in stm32_clk_configure_clk()968 stm32_gate_enable(gate); in stm32_clk_configure_clk()970 stm32_gate_disable(gate); in stm32_clk_configure_clk()
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