Searched refs:layout (Results 1 – 6 of 6) sorted by relevance
/optee_os-3.20.0/core/drivers/clk/sam/ |
A D | at91_programmable.c | 18 #define PROG_PRES(layout, pckr) \ argument 20 typeof(layout) __layout = layout; \ 36 const struct clk_programmable_layout *layout = prog->layout; in clk_programmable_get_rate() local 40 if (layout->is_pres_direct) in clk_programmable_get_rate() 51 const struct clk_programmable_layout *layout = prog->layout; in clk_programmable_set_parent() local 55 if (layout->have_slck_mck) in clk_programmable_set_parent() 73 const struct clk_programmable_layout *layout = prog->layout; in clk_programmable_get_parent() local 97 const struct clk_programmable_layout *layout = prog->layout; in clk_programmable_set_rate() local 104 if (layout->is_pres_direct) { in clk_programmable_set_rate() 120 layout->pres_mask << layout->pres_shift, in clk_programmable_set_rate() [all …]
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A D | at91_peripheral.c | 26 const struct clk_pcr_layout *layout; member 64 (periph->id & periph->layout->pid_mask)); in clk_sam9x5_peripheral_enable() 66 periph->layout->div_mask | periph->layout->cmd | in clk_sam9x5_peripheral_enable() 69 periph->layout->cmd | in clk_sam9x5_peripheral_enable() 83 (periph->id & periph->layout->pid_mask)); in clk_sam9x5_peripheral_disable() 85 AT91_PMC_PCR_EN | periph->layout->cmd, in clk_sam9x5_peripheral_disable() 86 periph->layout->cmd); in clk_sam9x5_peripheral_disable() 100 periph->id & periph->layout->pid_mask); in clk_sam9x5_peripheral_get_rate() 150 const struct clk_pcr_layout *layout, in at91_clk_register_sam9x5_periph() argument 173 if (layout->div_mask) in at91_clk_register_sam9x5_periph() [all …]
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A D | at91_generated.c | 26 const struct clk_pcr_layout *layout; member 35 io_write32(gck->base + gck->layout->offset, in clk_generated_enable() 36 (gck->id & gck->layout->pid_mask)); in clk_generated_enable() 39 gck->layout->cmd | AT91_PMC_PCR_GCKEN, in clk_generated_enable() 41 gck->layout->cmd | in clk_generated_enable() 53 io_write32(gck->base + gck->layout->offset, in clk_generated_disable() 54 gck->id & gck->layout->pid_mask); in clk_generated_disable() 56 gck->layout->cmd); in clk_generated_disable() 131 (gck->id & gck->layout->pid_mask)); in clk_generated_startup() 141 const struct clk_pcr_layout *layout, in at91_clk_register_generated() argument [all …]
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A D | at91_master.c | 21 const struct clk_master_layout *layout; member 53 const struct clk_master_layout *layout = master->layout; in clk_master_div_get_rate() local 56 mckr = io_read32(master->base + master->layout->offset); in clk_master_div_get_rate() 58 mckr &= layout->mask; in clk_master_div_get_rate() 85 val = io_read32(master->base + master->layout->offset); in clk_master_pres_get_rate() 114 const struct clk_master_layout *layout, in at91_clk_register_master_internal() argument 134 master->layout = layout; in at91_clk_register_master_internal() 155 const struct clk_master_layout *layout, in at91_clk_register_master_pres() argument 160 parents, layout, in at91_clk_register_master_pres() 168 const struct clk_master_layout *layout, in at91_clk_register_master_div() argument [all …]
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A D | at91_pll.c | 21 #define PLL_MUL(reg, layout) \ argument 23 typeof(layout) __layout = layout; \ 28 #define PLL_MUL_MASK(layout) ((layout)->mul_mask) argument 29 #define PLL_MUL_MAX(layout) (PLL_MUL_MASK(layout) + 1) argument 43 const struct clk_pll_layout *layout; member 57 const struct clk_pll_layout *layout = pll->layout; in clk_pll_enable() local 70 mul = PLL_MUL(pllr, layout); in clk_pll_enable() 88 ((pll->mul & layout->mul_mask) << layout->mul_shift)); in clk_pll_enable() 120 const struct clk_pll_layout *layout = pll->layout; in clk_pll_get_best_div_mul() local 283 pll->layout = layout; in at91_clk_register_pll() [all …]
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A D | at91_clk.h | 147 const struct clk_pll_layout *layout, 164 const struct clk_master_layout *layout, 171 const struct clk_master_layout *layout, 189 const struct clk_programmable_layout *layout); 197 const struct clk_pcr_layout *layout, 203 const struct clk_pcr_layout *layout,
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