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Searched refs:parent_rate (Results 1 – 18 of 18) sorted by relevance

/optee_os-3.20.0/core/drivers/clk/sam/
A Dat91_h32mx.c18 unsigned long parent_rate) in clk_sama5d4_h32mx_get_rate() argument
24 return parent_rate / 2; in clk_sama5d4_h32mx_get_rate()
26 if (parent_rate > H32MX_MAX_FREQ) in clk_sama5d4_h32mx_get_rate()
29 return parent_rate; in clk_sama5d4_h32mx_get_rate()
34 unsigned long parent_rate) in clk_sama5d4_h32mx_set_rate() argument
39 if (parent_rate != rate && (parent_rate / 2) != rate) in clk_sama5d4_h32mx_set_rate()
42 if ((parent_rate / 2) == rate) in clk_sama5d4_h32mx_set_rate()
A Dat91_plldiv.c16 unsigned long parent_rate) in clk_plldiv_get_rate() argument
22 return parent_rate / 2; in clk_plldiv_get_rate()
24 return parent_rate; in clk_plldiv_get_rate()
28 unsigned long parent_rate) in clk_plldiv_set_rate() argument
32 if (parent_rate != rate && (parent_rate / 2 != rate)) in clk_plldiv_set_rate()
36 parent_rate != rate ? AT91_PMC_PLLADIV2 : 0); in clk_plldiv_set_rate()
A Dat91_audio_pll.c158 return parent_rate * (nd + 1) + fr; in clk_audio_pll_fout()
162 unsigned long parent_rate) in clk_audio_pll_frac_get_rate() argument
170 unsigned long parent_rate) in clk_audio_pll_pad_get_rate() argument
182 unsigned long parent_rate) in clk_audio_pll_pmc_get_rate() argument
190 unsigned long parent_rate, in clk_audio_pll_frac_compute_frac() argument
197 if (!rate || !parent_rate) in clk_audio_pll_frac_compute_frac()
201 rem = tmp % parent_rate; in clk_audio_pll_frac_compute_frac()
202 tmp /= parent_rate; in clk_audio_pll_frac_compute_frac()
243 unsigned long parent_rate) in clk_audio_pll_pad_set_rate() argument
251 tmp_div = parent_rate / rate; in clk_audio_pll_pad_set_rate()
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A Dat91_peripheral.c34 unsigned long parent_rate = 0; in clk_sam9x5_peripheral_autodiv() local
42 parent_rate = clk_get_rate(parent); in clk_sam9x5_peripheral_autodiv()
43 if (!parent_rate) in clk_sam9x5_peripheral_autodiv()
47 if (parent_rate >> shift <= periph->range.max) in clk_sam9x5_peripheral_autodiv()
91 unsigned long parent_rate) in clk_sam9x5_peripheral_get_rate() argument
97 return parent_rate; in clk_sam9x5_peripheral_get_rate()
110 return parent_rate >> periph->div; in clk_sam9x5_peripheral_get_rate()
115 unsigned long parent_rate) in clk_sam9x5_peripheral_set_rate() argument
121 if (parent_rate == rate) in clk_sam9x5_peripheral_set_rate()
131 if (parent_rate >> shift == rate) { in clk_sam9x5_peripheral_set_rate()
A Dat91_pll.c105 unsigned long parent_rate) in clk_pll_get_rate() argument
112 return (parent_rate / pll->div) * (pll->mul + 1); in clk_pll_get_rate()
116 unsigned long parent_rate, in clk_pll_get_best_div_mul() argument
132 if (parent_rate < charac->input.min) in clk_pll_get_best_div_mul()
141 mindiv = (parent_rate * PLL_MUL_MIN) / rate; in clk_pll_get_best_div_mul()
145 if (parent_rate > charac->input.max) { in clk_pll_get_best_div_mul()
146 tmpdiv = DIV_ROUND_UP(parent_rate, charac->input.max); in clk_pll_get_best_div_mul()
176 tmpmul = UDIV_ROUND_NEAREST(rate, parent_rate / tmpdiv); in clk_pll_get_best_div_mul()
177 tmprate = (parent_rate / tmpdiv) * tmpmul; in clk_pll_get_best_div_mul()
228 unsigned long parent_rate) in clk_pll_set_rate() argument
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A Dat91_utmi.c40 unsigned long parent_rate = 0; in clk_utmi_enable() local
48 parent_rate = clk_get_rate(clk_parent); in clk_utmi_enable()
50 switch (parent_rate) { in clk_utmi_enable()
96 unsigned long parent_rate __unused) in clk_utmi_get_rate()
A Dat91_usb.c27 unsigned long parent_rate) in at91sam9x5_clk_usb_get_rate() argument
35 return UDIV_ROUND_NEAREST(parent_rate, (usbdiv + 1)); in at91sam9x5_clk_usb_get_rate()
60 unsigned long parent_rate) in at91sam9x5_clk_usb_set_rate() argument
68 div = UDIV_ROUND_NEAREST(parent_rate, rate); in at91sam9x5_clk_usb_set_rate()
A Dat91_programmable.c33 unsigned long parent_rate) in clk_programmable_get_rate() argument
41 rate = parent_rate / (PROG_PRES(layout, pckr) + 1); in clk_programmable_get_rate()
43 rate = parent_rate >> PROG_PRES(layout, pckr); in clk_programmable_get_rate()
94 unsigned long parent_rate) in clk_programmable_set_rate() argument
98 unsigned long div = parent_rate / rate; in clk_programmable_set_rate()
A Dat91_main.c75 pmc_main_rc_osc_get_rate(struct clk *clk, unsigned long parent_rate __unused) in pmc_main_rc_osc_get_rate()
205 unsigned long parent_rate) in clk_main_get_rate() argument
209 if (parent_rate) in clk_main_get_rate()
210 return parent_rate; in clk_main_get_rate()
238 unsigned long parent_rate) in clk_sam9x5_main_get_rate() argument
242 return clk_main_get_rate(pmc->base, parent_rate); in clk_sam9x5_main_get_rate()
A Dat91_master.c47 unsigned long parent_rate) in clk_master_div_get_rate() argument
51 unsigned long rate = parent_rate; in clk_master_div_get_rate()
78 unsigned long parent_rate) in clk_master_pres_get_rate() argument
91 return UDIV_ROUND_NEAREST(parent_rate, pres); in clk_master_pres_get_rate()
A Dat91_generated.c60 clk_generated_get_rate(struct clk *clk, unsigned long parent_rate) in clk_generated_get_rate() argument
64 return UDIV_ROUND_NEAREST(parent_rate, gck->gckdiv + 1); in clk_generated_get_rate()
89 unsigned long parent_rate) in clk_generated_set_rate() argument
100 div = UDIV_ROUND_NEAREST(parent_rate, rate); in clk_generated_set_rate()
A Dat91_sckc.c13 unsigned long parent_rate __unused) in sckc_get_rate()
/optee_os-3.20.0/core/drivers/clk/
A Dclk-stm32-core.c242 div = UDIV_ROUND_NEAREST((uint64_t)parent_rate, rate); in divider_get_val()
380 unsigned long parent_rate) in clk_stm32_divider_get_rate() argument
384 return stm32_div_get_rate(cfg->div_id, parent_rate); in clk_stm32_divider_get_rate()
389 unsigned long parent_rate) in clk_stm32_divider_set_rate() argument
393 return stm32_div_set_rate(cfg->div_id, rate, parent_rate); in clk_stm32_divider_set_rate()
425 unsigned long parent_rate) in clk_stm32_composite_get_rate() argument
430 return parent_rate; in clk_stm32_composite_get_rate()
432 return stm32_div_get_rate(cfg->div_id, parent_rate); in clk_stm32_composite_get_rate()
436 unsigned long parent_rate) in clk_stm32_composite_set_rate() argument
509 unsigned long parent_rate) in fixed_factor_get_rate() argument
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A Dclk.c59 unsigned long parent_rate = 0; in clk_compute_rate_no_lock() local
62 parent_rate = clk->parent->rate; in clk_compute_rate_no_lock()
65 clk->rate = clk->ops->get_rate(clk, parent_rate); in clk_compute_rate_no_lock()
67 clk->rate = parent_rate; in clk_compute_rate_no_lock()
193 unsigned long parent_rate = 0; in clk_set_rate_no_lock() local
196 parent_rate = clk_get_rate(clk->parent); in clk_set_rate_no_lock()
198 res = clk->ops->set_rate(clk, rate, parent_rate); in clk_set_rate_no_lock()
A Dclk-stm32-core.h135 unsigned long parent_rate);
139 unsigned long parent_rate);
144 unsigned long parent_rate);
146 unsigned long parent_rate);
A Dfixed_clk.c17 unsigned long parent_rate __unused) in fixed_clk_get_rate()
A Dclk-stm32mp15.c979 static long get_timer_rate(long parent_rate, unsigned int apb_bus) in get_timer_rate() argument
1004 return parent_rate; in get_timer_rate()
1006 return parent_rate * (timgxpre + 1) * 2; in get_timer_rate()
1458 unsigned long parent_rate __unused) in clk_op_compute_rate()
/optee_os-3.20.0/core/include/drivers/
A Dclk.h59 unsigned long parent_rate);
61 unsigned long parent_rate);

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