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Searched refs:pinctrl (Results 1 – 25 of 32) sorted by relevance

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/optee_os-3.20.0/core/arch/arm/dts/
A Dstm32mp157c-ev1.dts35 pinctrl-0 = <&joystick_pins>;
36 pinctrl-names = "default";
73 pinctrl-names = "default";
74 pinctrl-0 = <&cec_pins_a>;
81 pinctrl-0 = <&dcmi_pins_a>;
153 pinctrl-0 = <&fmc_pins_a>;
171 pinctrl-0 = <&i2c2_pins_a>;
207 stmfx_pinctrl: pinctrl {
225 pinctrl-0 = <&i2c5_pins_a>;
291 pinctrl-names = "default";
[all …]
A Dstm32mp15xxaa-pinctrl.dtsi7 &pinctrl {
13 gpio-ranges = <&pinctrl 0 0 16>;
19 gpio-ranges = <&pinctrl 0 16 16>;
25 gpio-ranges = <&pinctrl 0 32 16>;
31 gpio-ranges = <&pinctrl 0 48 16>;
37 gpio-ranges = <&pinctrl 0 64 16>;
43 gpio-ranges = <&pinctrl 0 80 16>;
49 gpio-ranges = <&pinctrl 0 96 16>;
55 gpio-ranges = <&pinctrl 0 112 16>;
61 gpio-ranges = <&pinctrl 0 128 16>;
[all …]
A Dstm32mp15xxac-pinctrl.dtsi7 &pinctrl {
13 gpio-ranges = <&pinctrl 0 0 16>;
19 gpio-ranges = <&pinctrl 0 16 16>;
25 gpio-ranges = <&pinctrl 0 32 16>;
31 gpio-ranges = <&pinctrl 0 48 16>;
37 gpio-ranges = <&pinctrl 0 64 16>;
43 gpio-ranges = <&pinctrl 0 80 16>;
49 gpio-ranges = <&pinctrl 0 96 16>;
55 gpio-ranges = <&pinctrl 0 112 16>;
61 gpio-ranges = <&pinctrl 0 128 12>;
A Dstm32mp15xxab-pinctrl.dtsi7 &pinctrl {
13 gpio-ranges = <&pinctrl 0 0 16>;
19 gpio-ranges = <&pinctrl 0 16 16>;
25 gpio-ranges = <&pinctrl 0 32 16>;
31 gpio-ranges = <&pinctrl 0 48 16>;
37 gpio-ranges = <&pinctrl 0 64 16>;
43 gpio-ranges = <&pinctrl 6 86 6>;
49 gpio-ranges = <&pinctrl 6 102 10>;
55 gpio-ranges = <&pinctrl 0 112 2>;
A Dstm32mp15xxad-pinctrl.dtsi7 &pinctrl {
13 gpio-ranges = <&pinctrl 0 0 16>;
19 gpio-ranges = <&pinctrl 0 16 16>;
25 gpio-ranges = <&pinctrl 0 32 16>;
31 gpio-ranges = <&pinctrl 0 48 16>;
37 gpio-ranges = <&pinctrl 0 64 16>;
43 gpio-ranges = <&pinctrl 6 86 6>;
49 gpio-ranges = <&pinctrl 6 102 10>;
55 gpio-ranges = <&pinctrl 0 112 2>;
A Dat91-sama5d27_som1_ek.dts34 pinctrl-names = "default";
45 pinctrl-names = "default";
57 pinctrl-names = "default";
64 pinctrl-names = "default";
71 pinctrl-names = "default";
81 pinctrl-names = "default";
103 pinctrl-names = "default";
111 pinctrl-names = "default";
119 pinctrl-names = "default";
151 pinctrl-names = "default";
[all …]
A Dstm32mp15xx-dhcor-avenger96.dtsi109 pinctrl-names = "default";
202 pinctrl-names = "default";
203 pinctrl-0 = <&i2c1_pins_b>;
212 pinctrl-names = "default";
213 pinctrl-0 = <&i2c2_pins_c>;
274 pinctrl-0 = <&ltdc_pins_d>;
367 pinctrl-names = "default";
368 pinctrl-0 = <&spi2_pins_a>;
378 pinctrl-names = "default";
388 pinctrl-names = "default";
[all …]
A Dstm32mp15xx-dkx.dtsi95 pinctrl-names = "default";
123 pinctrl-0 = <&cec_pins_b>;
165 pinctrl-0 = <&i2c1_pins_a>;
240 pinctrl-0 = <&i2c4_pins_a>;
255 pinctrl-names = "default";
420 pinctrl-0 = <&i2c5_pins_a>;
435 pinctrl-0 = <&i2s2_pins_a>;
464 pinctrl-0 = <&ltdc_pins_a>;
575 pinctrl-0 = <&pwm1_pins_a>;
590 pinctrl-0 = <&pwm3_pins_a>;
[all …]
A Dat91-sama5d2_xplained.dts43 pinctrl-names = "default";
54 pinctrl-names = "default";
65 pinctrl-names = "default";
74 pinctrl-names = "default";
83 pinctrl-names = "default";
135 pinctrl-names = "default";
147 pinctrl-names = "default";
172 pinctrl-names = "default";
422 pinctrl@fc039000 {
705 pinctrl-names = "default";
[all …]
A Dstm32mp157a-dhcor-avenger96.dts27 pinctrl-names = "default", "sleep";
28 pinctrl-0 = <&m_can1_pins_b>;
29 pinctrl-1 = <&m_can1_sleep_pins_b>;
34 pinctrl-names = "default", "sleep";
35 pinctrl-0 = <&m_can2_pins_a>;
36 pinctrl-1 = <&m_can2_sleep_pins_a>;
A Dstm32mp15xx-dhcom-pdk2.dtsi144 pinctrl-names = "default";
145 pinctrl-0 = <&cec_pins_a>;
150 pinctrl-names = "default";
151 pinctrl-0 = <&i2c2_pins_a>;
161 pinctrl-names = "default";
162 pinctrl-0 = <&i2c5_pins_a>;
209 pinctrl-0 = <&ltdc_pins_b>;
272 pinctrl-names = "default";
281 pinctrl-names = "default";
289 pinctrl-names = "default";
[all …]
A Dat91-sama5d27_som1.dtsi37 pinctrl-names = "default";
38 pinctrl-0 = <&pinctrl_qspi1_default>;
83 pinctrl-names = "default";
84 pinctrl-0 = <&pinctrl_macb0_default>;
91 pinctrl-names = "default";
92 pinctrl-0 = <&pinctrl_macb0_phy_irq>;
98 pinctrl-names = "default";
99 pinctrl-0 = <&pinctrl_i2c0_default>;
109 pinctrl@fc039000 {
A Dstm32mp15xx-dhcom-som.dtsi7 #include "stm32mp15-pinctrl.dtsi"
8 #include "stm32mp15xxaa-pinctrl.dtsi"
103 pinctrl-names = "default";
124 pinctrl-names = "default", "sleep";
152 pinctrl-0 = <&fmc_pins_b>;
153 pinctrl-1 = <&fmc_sleep_pins_b>;
244 pinctrl-names = "default";
245 pinctrl-0 = <&i2c4_pins_a>;
526 pinctrl-0 = <&sdmmc3_b4_pins_a>;
539 pinctrl-names = "default";
[all …]
A Dstm32mp157c-ed1.dts10 #include "stm32mp15-pinctrl.dtsi"
11 #include "stm32mp15xxaa-pinctrl.dtsi"
104 pinctrl-0 = <&adc1_in6_pins_a>;
105 pinctrl-names = "default";
130 pinctrl-names = "default";
155 pinctrl-names = "default", "sleep";
156 pinctrl-0 = <&i2c4_pins_a>;
157 pinctrl-1 = <&i2c4_sleep_pins_a>;
396 pinctrl-0 = <&uart4_pins_a>;
397 pinctrl-1 = <&uart4_sleep_pins_a>;
[all …]
A Dstm32mp157c-dk2.dts11 #include "stm32mp15-pinctrl.dtsi"
12 #include "stm32mp15xxac-pinctrl.dtsi"
103 pinctrl-names = "default", "sleep", "idle";
104 pinctrl-0 = <&usart2_pins_c>;
105 pinctrl-1 = <&usart2_sleep_pins_c>;
106 pinctrl-2 = <&usart2_idle_pins_c>;
A Dstm32mp157c-dhcom-pdk2.dts25 pinctrl-names = "default", "sleep";
26 pinctrl-0 = <&m_can1_pins_a>;
27 pinctrl-1 = <&m_can1_sleep_pins_a>;
A Dstm32mp135f-dk.dts12 #include "stm32mp13-pinctrl.dtsi"
227 pinctrl-names = "default";
228 pinctrl-0 = <&uart4_pins_a>;
233 pinctrl-names = "default";
234 pinctrl-0 = <&usart1_pins_a>;
240 pinctrl-names = "default";
241 pinctrl-0 = <&uart8_pins_a>;
A Dstm32mp131.dtsi252 pinctrl: pin-controller@50002000 { label
255 compatible = "st,stm32mp135-pinctrl";
268 gpio-ranges = <&pinctrl 0 0 16>;
280 gpio-ranges = <&pinctrl 0 16 16>;
292 gpio-ranges = <&pinctrl 0 32 16>;
304 gpio-ranges = <&pinctrl 0 48 16>;
316 gpio-ranges = <&pinctrl 0 64 16>;
328 gpio-ranges = <&pinctrl 0 80 16>;
340 gpio-ranges = <&pinctrl 0 96 16>;
352 gpio-ranges = <&pinctrl 0 112 15>;
[all …]
A Dstm32mp157a-dk1.dts10 #include "stm32mp15-pinctrl.dtsi"
11 #include "stm32mp15xxac-pinctrl.dtsi"
A Dstm32mp15xx-dhcor-som.dtsi9 #include "stm32mp15-pinctrl.dtsi"
10 #include "stm32mp15xxac-pinctrl.dtsi"
76 pinctrl-names = "default";
77 pinctrl-0 = <&i2c4_pins_a>;
251 pinctrl-names = "default", "sleep";
252 pinctrl-0 = <&qspi_clk_pins_a &qspi_bk1_pins_a>;
253 pinctrl-1 = <&qspi_clk_sleep_pins_a &qspi_bk1_sleep_pins_a>;
/optee_os-3.20.0/core/include/drivers/
A Dstm32_gpio.h82 void stm32_pinctrl_load_active_cfg(struct stm32_pinctrl *pinctrl, size_t cnt);
83 void stm32_pinctrl_load_standby_cfg(struct stm32_pinctrl *pinctrl, size_t cnt);
91 void stm32_pinctrl_store_standby_cfg(struct stm32_pinctrl *pinctrl, size_t cnt);
112 struct stm32_pinctrl *pinctrl, size_t count);
129 static inline void stm32_pinctrl_set_gpio_level(struct stm32_pinctrl *pinctrl, in stm32_pinctrl_set_gpio_level() argument
132 stm32_gpio_set_output_level(pinctrl->bank, pinctrl->pin, high); in stm32_pinctrl_set_gpio_level()
150 static inline int stm32_pinctrl_get_gpio_level(struct stm32_pinctrl *pinctrl) in stm32_pinctrl_get_gpio_level() argument
152 return stm32_gpio_get_input_level(pinctrl->bank, pinctrl->pin); in stm32_pinctrl_get_gpio_level()
/optee_os-3.20.0/core/drivers/
A Dstm32_gpio.c138 void stm32_pinctrl_load_active_cfg(struct stm32_pinctrl *pinctrl, size_t cnt) in stm32_pinctrl_load_active_cfg() argument
143 set_gpio_cfg(pinctrl[n].bank, pinctrl[n].pin, in stm32_pinctrl_load_active_cfg()
144 &pinctrl[n].active_cfg); in stm32_pinctrl_load_active_cfg()
152 set_gpio_cfg(pinctrl[n].bank, pinctrl[n].pin, in stm32_pinctrl_load_standby_cfg()
153 &pinctrl[n].standby_cfg); in stm32_pinctrl_load_standby_cfg()
161 get_gpio_cfg(pinctrl[n].bank, pinctrl[n].pin, in stm32_pinctrl_store_standby_cfg()
162 &pinctrl[n].standby_cfg); in stm32_pinctrl_store_standby_cfg()
202 struct stm32_pinctrl *pinctrl, size_t count) in get_pinctrl_from_fdt() argument
284 struct stm32_pinctrl *ref = &pinctrl[found]; in get_pinctrl_from_fdt()
306 struct stm32_pinctrl *pinctrl, size_t count) in stm32_pinctrl_fdt_get_pinctrl() argument
[all …]
A Dstm32_uart.c118 stm32mp_register_secure_gpio(pd->pinctrl[n].bank, in register_secure_uart()
119 pd->pinctrl[n].pin); in register_secure_uart()
128 stm32mp_register_non_secure_gpio(pd->pinctrl[n].bank, in register_non_secure_uart()
129 pd->pinctrl[n].pin); in register_non_secure_uart()
183 pd->pinctrl = pinctrl_cfg; in stm32_uart_init_from_dt_node()
/optee_os-3.20.0/core/drivers/crypto/se050/glue/
A Di2c_stm32.c70 struct stm32_pinctrl *pinctrl = NULL; in native_i2c_init() local
78 if (dt_i2c_bus_config(&i2c_init, &pinctrl, &pin_count)) in native_i2c_init()
86 i2c.pinctrl = pinctrl; in native_i2c_init()
/optee_os-3.20.0/core/arch/arm/plat-stm32mp1/drivers/
A Dstm32mp1_pmic.c463 struct stm32_pinctrl **pinctrl, in dt_pmic_i2c_config() argument
497 pinctrl, pinctrl_count)) in dt_pmic_i2c_config()
513 struct stm32_pinctrl *pinctrl = NULL; in initialize_pmic_i2c() local
517 ret = dt_pmic_i2c_config(&i2c_info, &pinctrl, &pin_count, &i2c_init); in initialize_pmic_i2c()
536 i2c->pinctrl = pinctrl; in initialize_pmic_i2c()
596 stm32mp_register_non_secure_gpio(i2c_handle.pinctrl[n].bank, in register_non_secure_pmic()
597 i2c_handle.pinctrl[n].pin); in register_non_secure_pmic()
607 stm32mp_register_secure_gpio(i2c_handle.pinctrl[n].bank, in register_secure_pmic()
608 i2c_handle.pinctrl[n].pin); in register_secure_pmic()

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