| /optee_os-3.20.0/core/arch/arm/sm/ |
| A D | pm_a32.S | 28 mov r5, sp
32 mov r1, r5
53 cmp r5, r4
56 cmp r5, r4
59 cmp r5, r4
66 read_diag r5
76 read_ttbr0 r5
86 read_nmrr r5
113 ldr r5, [r4]
149 cmp r5, r4
[all …]
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| /optee_os-3.20.0/ldelf/ |
| A D | start_a32.S | 25 ldr r5, reloc_begin_rel
27 add r5, r5, r4
29 cmp r5, r6
35 1: ldmia r5!, {r7-r8} /* r7 == r_offset, r8 = r_info */
47 cmp r5, r6
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| A D | syscalls_a32.S | 21 push {r5-r7, lr}
22 UNWIND( .save {r5-r7, lr})
32 add r5, sp, #(4 * 4)
36 pop {r5-r7, pc}
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| /optee_os-3.20.0/core/arch/arm/kernel/ |
| A D | thread_spmc_a32.S | 22 mov r5, #FFA_PARAM_MBZ /* Param MBZ */
52 push {r4, r5} /* Pass these following the arm32 calling convention */
56 mov r5, r0 /* Save return value */
66 mov r3, r5 /* Return value */
68 mov r5, #FFA_PARAM_MBZ /* Unused parameter */
132 mov r5, #FFA_PARAM_MBZ
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| A D | entry_a32.S | 41 mov r5, r1
54 mov r1, r5
179 mov r5, #0
194 mov r5, lr
667 push {r4-r5}
707 ldr r5, [r4, r1]
708 add r5, r5, r0
709 str r5, [r4, r1]
714 pop {r4-r5}
851 mov r5, r1
[all …]
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| A D | thread_optee_smc_a32.S | 174 push {r4, r5} /* Pass these following the arm32 calling convention */
208 ldr r5, [sp] /* Get pointer to rv[] */
218 ldm r5, {r1-r3} /* Load rv[] into r0-r2 */
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| A D | thread_a32.S | 190 mov r5, r12 /* Save CPSR in a preserved register */
217 mov r0, r5 /* Return original CPSR */
317 push {r1, r2, r4, r5}
339 str r2, [r5]
880 read_vbar r5 /* This register must be preserved */
881 sub r3, r5, r2
954 write_vbar r5
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| A D | cache_helpers_a32.S | 126 clz r5, r4 // r5 = the bit position of the way size increment
133 orr r0, r1, r9, LSL r5 // factor in the way number and cache level into r0
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| A D | asm-defines.c | 27 DEFINE(THREAD_SVC_REG_R5, offsetof(struct thread_svc_regs, r5));
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| A D | stmm_sp.c | 47 #define SVC_REGS_A5(_regs) ((_regs)->r5)
442 spc->regs.r5 = 0; in stmm_enter_invoke_cmd()
585 spc->regs.r5 = svc_regs->r5; in save_sp_ctx()
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| A D | abort.c | 57 state.registers[5] = ai->regs->r5; in __print_stack_unwind()
163 ai->regs->r1, ai->regs->r5, ai->regs->r9, sp); in __print_abort_info()
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| A D | ldelf_loader.c | 230 arg->arm32.regs[5] = tsd->abort_regs.r5; in ldelf_dump_state()
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| A D | thread.c | 178 thread->regs.r5 = a5; in init_regs()
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| /optee_os-3.20.0/core/arch/arm/tee/ |
| A D | arch_svc_a32.S | 20 push {r5-r9, lr}
24 ldr r5, [r8, #THREAD_SVC_REG_R5]
41 mov r1, r5
57 pop {r5-r9, pc}
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| A D | arch_svc.c | 342 .r5 = pushed[6], in save_panic_regs_a32_ta()
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| /optee_os-3.20.0/lib/libutee/arch/arm/ |
| A D | utee_syscalls_a32.S | 18 push {r5-r7,lr}
19 UNWIND( .save {r5-r7,lr})
42 add r5, sp, #(4 * 4)
45 pop {r5-r7,pc}
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| /optee_os-3.20.0/lib/libutils/isoc/arch/arm/ |
| A D | setjmp_a32.S | 100 stmia r0!, {r4, r5, r6, r7}
105 mov r5, sp
107 stmia r0!, {r1, r2, r3, r4, r5, r6}
110 ldmia r0!, {r4, r5, r6, r7}
121 ldmia r0!, {r2, r3, r4, r5, r6}
125 mov fp, r5
130 ldmia r0!, {r4, r5, r6, r7}
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| /optee_os-3.20.0/core/arch/arm/plat-imx/pm/ |
| A D | psci-cpuidle-imx7.S | 51 read_mpidr r5
52 and r5, r5, #3
54 cmp r5, #0
63 str r5, [r6]
69 cmpeq r9, r5
274 cmp r5, #0x1
286 cmp r5, #0x1
383 cmp r5, #0x1
411 cmp r5, #0x1
439 cmp r5, #0x1
[all …]
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| A D | psci-suspend-imx7.S | 195 cmp r5, #0x0
308 cmp r5, #0x0
538 ldr r5, [r11, #MX7D_GPC_IMR2]
567 str r5, [r11, #MX7D_GPC_IMR2]
590 mov r5, #0x0
644 mov r5, #0x1
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| /optee_os-3.20.0/core/arch/arm/crypto/ |
| A D | aes_modes_armv8a_ce_a32.S | 221 ldrd r4, r5, [sp, #16]
222 vld1.8 {q0}, [r5]
231 vst1.8 {q0}, [r5]
242 ldrd r4, r5, [sp, #16]
285 ldrd r4, r5, [sp, #16]
286 vld1.8 {q6}, [r5] @ load ctr
335 vst1.8 {q6}, [r5]
378 ldr r5, [sp, #24]
379 vld1.8 {q0}, [r5] @ load iv
440 vst1.8 {q3}, [r5]
[all …]
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| /optee_os-3.20.0/core/arch/arm/include/sm/ |
| A D | sm.h | 60 uint32_t r5; member
77 uint32_t r5; member
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| /optee_os-3.20.0/core/arch/arm/plat-ti/ |
| A D | a9_plat_init.S | 82 mov r0, r5
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| /optee_os-3.20.0/core/arch/arm/include/kernel/ |
| A D | thread_arch.h | 126 uint32_t r5; member
187 uint32_t r5; member
246 uint32_t r5; member
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| /optee_os-3.20.0/core/drivers/pm/sam/ |
| A D | pm_suspend.S | 23 tmp2 .req r5
|