Searched refs:rcc_base (Results 1 – 3 of 3) sorted by relevance
58 vaddr_t rcc_base = stm32_rcc_base(); in reset_assert() local68 io_clrbits32(rcc_base + RCC_MP_GCR, RCC_MP_GCR_BOOT_MCU); in reset_assert()82 io_write32(rcc_base + offset, bit_mask); in reset_assert()87 while (!(io_read32(rcc_base + offset) & bit_mask)) in reset_assert()91 if (!(io_read32(rcc_base + offset) & bit_mask)) in reset_assert()101 vaddr_t rcc_base = stm32_rcc_base(); in reset_deassert() local111 io_setbits32(rcc_base + RCC_MP_GCR, RCC_MP_GCR_BOOT_MCU); in reset_deassert()124 io_write32(rcc_base + offset, bit_mask); in reset_deassert()129 while ((io_read32(rcc_base + offset) & bit_mask)) in reset_deassert()133 if (io_read32(rcc_base + offset) & bit_mask) in reset_deassert()
645 vaddr_t rcc_base = stm32_rcc_base(); in stm32mp1_clk_get_parent() local751 vaddr_t rcc_base = stm32_rcc_base(); in get_clock_rate() local756 reg = io_read32(rcc_base + RCC_MPCKSELR); in get_clock_rate()768 reg = io_read32(rcc_base + RCC_MPCKDIVR); in get_clock_rate()786 reg = io_read32(rcc_base + RCC_ASSCKSELR); in get_clock_rate()802 reg = io_read32(rcc_base + RCC_AXIDIVR); in get_clock_rate()807 reg = io_read32(rcc_base + RCC_APB4DIVR); in get_clock_rate()811 reg = io_read32(rcc_base + RCC_APB5DIVR); in get_clock_rate()842 reg = io_read32(rcc_base + RCC_MCUDIVR); in get_clock_rate()983 vaddr_t rcc_base = stm32_rcc_base(); in get_timer_rate() local[all …]
88 uintptr_t rcc_base; member1899 uintptr_t rcc_base = priv->base; in ck_timer_get_rate_ops() local1901 prescaler = io_read32(rcc_base + cfg->apbdiv) & APB_DIV_MASK; in ck_timer_get_rate_ops()1903 timpre = io_read32(rcc_base + cfg->timpre) & TIM_PRE_MASK; in ck_timer_get_rate_ops()
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