Searched refs:register_phys_mem (Results 1 – 16 of 16) sorted by relevance
| /optee_os-3.20.0/core/arch/arm/plat-hisilicon/ |
| A D | main.c | 16 register_phys_mem(MEM_AREA_IO_NSEC, CONSOLE_UART_BASE, PL011_REG_SIZE);
18 register_phys_mem(MEM_AREA_IO_SEC, BOOTSRAM_BASE, BOOTSRAM_SIZE);
21 register_phys_mem(MEM_AREA_IO_SEC, CPU_CRG_BASE, CPU_CRG_SIZE);
24 register_phys_mem(MEM_AREA_IO_SEC, SYS_CTRL_BASE, SYS_CTRL_SIZE);
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| /optee_os-3.20.0/core/arch/arm/plat-aspeed/ |
| A D | platform_ast2600.c | 46 register_phys_mem(MEM_AREA_IO_NSEC, CONSOLE_UART_BASE, SMALL_PAGE_SIZE);
47 register_phys_mem(MEM_AREA_IO_SEC, GIC_BASE + GICD_OFFSET, GIC_DIST_REG_SIZE);
48 register_phys_mem(MEM_AREA_IO_SEC, GIC_BASE + GICC_OFFSET, GIC_CPU_REG_SIZE);
49 register_phys_mem(MEM_AREA_IO_SEC, AHBC_BASE, SMALL_PAGE_SIZE);
50 register_phys_mem(MEM_AREA_IO_NSEC, SCU_BASE, SMALL_PAGE_SIZE);
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| /optee_os-3.20.0/core/arch/arm/plat-bcm/ |
| A D | main.c | 49 register_phys_mem(MEM_AREA_RAM_SEC, BCM_DRAM0_SEC_BASE, BCM_DRAM0_SEC_SIZE);
52 register_phys_mem(MEM_AREA_IO_NSEC, CFG_BCM_ELOG_AP_UART_LOG_BASE,
56 register_phys_mem(MEM_AREA_RAM_NSEC, CFG_BCM_ELOG_BASE, CFG_BCM_ELOG_SIZE);
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| /optee_os-3.20.0/core/arch/arm/plat-imx/ |
| A D | main.c | 81 register_phys_mem(MEM_AREA_TEE_COHERENT,
86 register_phys_mem(MEM_AREA_IO_SEC, M4_AIPS_BASE, M4_AIPS_SIZE);
89 register_phys_mem(MEM_AREA_TEE_COHERENT,
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| /optee_os-3.20.0/core/arch/arm/plat-imx/drivers/ |
| A D | tzc380.c | 25 register_phys_mem(MEM_AREA_IO_SEC, TZASC2_BASE, TZASC_SIZE);
28 register_phys_mem(MEM_AREA_IO_SEC, TZASC_BASE, TZASC_SIZE);
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| /optee_os-3.20.0/core/arch/arm/plat-rzn1/ |
| A D | main.c | 35 register_phys_mem(MEM_AREA_IO_SEC, GIC_BASE, CORE_MMU_PGDIR_SIZE);
36 register_phys_mem(MEM_AREA_IO_SEC, PERIPH_REG_BASE, CORE_MMU_PGDIR_SIZE);
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| /optee_os-3.20.0/core/arch/riscv/plat-spike/drivers/ |
| A D | htif.c | 17 register_phys_mem(MEM_AREA_IO_NSEC, HTIF_BASE,
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| /optee_os-3.20.0/core/arch/arm/plat-marvell/ |
| A D | main.c | 66 register_phys_mem(MEM_AREA_IO_SEC, PLAT_MARVELL_FUSF_FUSE_BASE,
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| /optee_os-3.20.0/core/arch/arm/plat-versal/ |
| A D | main.c | 42 register_phys_mem(MEM_AREA_IO_SEC, PLM_RTCA, PLM_RTCA_LEN);
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| /optee_os-3.20.0/core/arch/arm/plat-ti/ |
| A D | main.c | 32 register_phys_mem(MEM_AREA_RAM_SEC, TZDRAM_BASE, TEE_RAM_VA_SIZE);
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| /optee_os-3.20.0/core/include/mm/ |
| A D | core_mmu.h | 198 #define register_phys_mem(type, addr, size) \ macro
208 register_phys_mem(type, ROUNDDOWN(addr, CORE_MMU_PGDIR_SIZE), \
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| /optee_os-3.20.0/core/arch/arm/plat-vexpress/ |
| A D | main.c | 39 register_phys_mem(MEM_AREA_RAM_SEC, TZCDRAM_BASE, TZCDRAM_SIZE);
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| /optee_os-3.20.0/core/drivers/ |
| A D | imx_sc_api.c | 88 register_phys_mem(MEM_AREA_IO_SEC, SC_IPC_BASE_SECURE, SC_IPC_SIZE);
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| /optee_os-3.20.0/core/drivers/crypto/aspeed/ |
| A D | hace_ast2600.c | 40 register_phys_mem(MEM_AREA_IO_SEC, HACE_BASE, SMALL_PAGE_SIZE);
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| /optee_os-3.20.0/core/arch/arm/plat-stm32mp1/ |
| A D | main.c | 51 register_phys_mem(MEM_AREA_IO_NSEC, CFG_STM32MP1_SCMI_SHM_BASE,
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| /optee_os-3.20.0/core/mm/ |
| A D | core_mmu.c | 113 register_phys_mem(MEM_AREA_TEE_RAM, TEE_RAM_START, TEE_RAM_PH_SIZE);
117 register_phys_mem(MEM_AREA_SEC_RAM_OVERALL, TRUSTED_DRAM_BASE,
128 register_phys_mem(MEM_AREA_TA_RAM, TA_RAM_START, TA_RAM_SIZE);
131 register_phys_mem(MEM_AREA_NSEC_SHM, TEE_SHMEM_START, TEE_SHMEM_SIZE);
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