Searched refs:sel (Results 1 – 5 of 5) sorted by relevance
| /optee_os-3.20.0/core/drivers/clk/ |
| A D | clk-stm32mp15.c | 252 .sel = (_parent_sel), \
264 .sel = _UNKNOWN_SEL, \
276 .sel = (_parent_sel), \
288 .sel = _UNKNOWN_SEL, \
303 .sel = (_parent_sel), \
313 .sel = _UNKNOWN_SEL, \
665 sel = clk_sel_ref(s); in stm32mp1_clk_get_parent()
666 p_sel = (io_read32(rcc_base + sel->offset) >> sel->src) & sel->msk; in stm32mp1_clk_get_parent()
667 if (p_sel < sel->nb_parent) in stm32mp1_clk_get_parent()
1085 p_sel = (io_read32(rcc_base + sel->offset) >> sel->src) & in get_parent_id_parent()
[all …]
|
| A D | clk-stm32mp13.c | 964 if (stm32_mux_set_parent(mux, sel)) in stm32_clk_configure_clk()
985 if (sel == 0) in stm32_clk_configure_mux()
992 if (stm32_mux_set_parent(mux, sel)) in stm32_clk_configure_mux()
1078 assert(sel >= 0 && sel < (int)ARRAY_SIZE(osc)); in clk_stm32_pll_get_oscillator_rate()
1141 size_t sel = 0; in clk_stm32_is_pll_config_on_the_fly() local
1260 int sel = 0; in clk_stm32_pll_init_switch_to_hsi_clk_system() local
1266 sel = stm32_mux_get_parent(mux_sys); in clk_stm32_pll_init_switch_to_hsi_clk_system()
1272 return sel; in clk_stm32_pll_init_switch_to_hsi_clk_system()
1303 uint8_t sel = 0; in clk_stm32_pll_init() local
1352 if (stm32_mux_set_parent(mux_sys, sel)) in clk_stm32_pll_init()
[all …]
|
| A D | clk-stm32-core.h | 123 TEE_Result stm32_mux_set_parent(uint16_t pid, uint8_t sel);
|
| A D | clk-stm32-core.c | 49 TEE_Result stm32_mux_set_parent(uint16_t mux_id, uint8_t sel) in stm32_mux_set_parent() argument
56 io_clrsetbits32(address, mask, (sel << mux->shift) & mask); in stm32_mux_set_parent()
|
| /optee_os-3.20.0/core/include/dt-bindings/clock/ |
| A D | stm32mp13-clksrc.h | 71 #define CLKSRC(mux_id, sel) ((CMD_MUX << CMD_SHIFT) |\ argument
73 (sel))
76 #define CLK_SRC(clk_id, sel) ((CMD_CLK << CMD_SHIFT) |\ argument
78 (sel) | CLK_ON_MASK)
|
Completed in 16 milliseconds