Searched refs:set_rate (Results 1 – 12 of 12) sorted by relevance
| /optee_os-3.20.0/core/drivers/clk/sam/ |
| A D | at91_plldiv.c | 43 .set_rate = clk_plldiv_set_rate,
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| A D | at91_h32mx.c | 52 .set_rate = clk_sama5d4_h32mx_set_rate,
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| A D | at91_audio_pll.c | 281 .set_rate = clk_audio_pll_frac_set_rate,
288 .set_rate = clk_audio_pll_pad_set_rate,
295 .set_rate = clk_audio_pll_pmc_set_rate,
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| A D | at91_usb.c | 82 .set_rate = at91sam9x5_clk_usb_set_rate,
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| A D | at91_programmable.c | 130 .set_rate = clk_programmable_set_rate,
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| A D | at91_peripheral.c | 145 .set_rate = clk_sam9x5_peripheral_set_rate,
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| A D | at91_generated.c | 114 .set_rate = clk_generated_set_rate,
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| A D | at91_pll.c | 252 .set_rate = clk_pll_set_rate,
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| /optee_os-3.20.0/core/include/drivers/ |
| A D | clk.h | 58 TEE_Result (*set_rate)(struct clk *clk, unsigned long rate, member
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| /optee_os-3.20.0/core/drivers/clk/ |
| A D | clk.c | 198 res = clk->ops->set_rate(clk, rate, parent_rate); in clk_set_rate_no_lock()
212 if (!clk->ops->set_rate) in clk_set_rate()
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| A D | clk-stm32-core.c | 398 .set_rate = clk_stm32_divider_set_rate,
466 .set_rate = clk_stm32_composite_set_rate,
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| A D | clk-stm32mp13.c | 1859 .set_rate = clk_stm32_pll1_set_rate,
1880 .set_rate = clk_stm32_composite_set_rate,
1887 .set_rate = clk_stm32_composite_set_rate,
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Completed in 21 milliseconds