Home
last modified time | relevance | path

Searched refs:stm32_rcc_base (Results 1 – 8 of 8) sorted by relevance

/optee_os-3.20.0/core/drivers/rstctrl/
A Dstm32_rstctrl.c58 vaddr_t rcc_base = stm32_rcc_base(); in reset_assert()
101 vaddr_t rcc_base = stm32_rcc_base(); in reset_deassert()
/optee_os-3.20.0/core/drivers/clk/
A Dclk-stm32mp15.c645 vaddr_t rcc_base = stm32_rcc_base(); in stm32mp1_clk_get_parent()
697 cfgr1 = io_read32(stm32_rcc_base() + pll->pllxcfgr1); in stm32mp1_pll_get_fvco()
698 fracr = io_read32(stm32_rcc_base() + pll->pllxfracr); in stm32mp1_pll_get_fvco()
739 cfgr2 = io_read32(stm32_rcc_base() + pll->pllxcfgr2); in stm32mp1_read_pll_freq()
751 vaddr_t rcc_base = stm32_rcc_base(); in get_clock_rate()
955 vaddr_t base = stm32_rcc_base(); in __clk_enable()
968 vaddr_t base = stm32_rcc_base(); in __clk_disable()
983 vaddr_t rcc_base = stm32_rcc_base(); in get_timer_rate()
1083 vaddr_t rcc_base = stm32_rcc_base(); in get_parent_id_parent()
1093 p_sel = io_read32(stm32_rcc_base() + pll->rckxselr) & in get_parent_id_parent()
[all …]
A Dclk-stm32mp13.c2648 res = clk_stm32_init(priv, stm32_rcc_base()); in stm32mp13_clk_probe()
/optee_os-3.20.0/core/arch/arm/plat-stm32mp1/
A Dstm32_util.h27 vaddr_t stm32_rcc_base(void);
A Dmain.c360 vaddr_t stm32_rcc_base(void) in stm32_rcc_base() function
/optee_os-3.20.0/core/arch/arm/plat-stm32mp1/pm/
A Dpsci.c95 io_write32(stm32_rcc_base() + RCC_MP_GRSTCSETR, in stm32_pm_cpu_power_down_wfi()
/optee_os-3.20.0/core/include/drivers/
A Dstm32mp1_rcc.h557 return io_read32(stm32_rcc_base() + RCC_TZCR) & RCC_TZCR_TZEN; in stm32_rcc_is_secure()
562 return io_read32(stm32_rcc_base() + RCC_TZCR) & RCC_TZCR_MCKPROT; in stm32_rcc_is_mckprot()
A Dstm32mp13_rcc.h1877 vaddr_t stm32_rcc_base(void);

Completed in 25 milliseconds