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/optee_os-3.20.0/core/arch/arm/kernel/
A Dvfp_a64.S10 stp q0, q1, [x0, #16 * 0]
11 stp q2, q3, [x0, #16 * 2]
12 stp q4, q5, [x0, #16 * 4]
13 stp q6, q7, [x0, #16 * 6]
14 stp q8, q9, [x0, #16 * 8]
15 stp q10, q11, [x0, #16 * 10]
31 ldp q0, q1, [x0, #16 * 0]
32 ldp q2, q3, [x0, #16 * 2]
33 ldp q4, q5, [x0, #16 * 4]
34 ldp q6, q7, [x0, #16 * 6]
[all …]
A Dentry_a64.S30 add x0, x0, #1
38 add x0, x0, x2
55 orr x0, x0, #SCTLR_I
56 orr x0, x0, #SCTLR_SA
57 orr x0, x0, #SCTLR_SPAN
59 orr x0, x0, #SCTLR_WXN
62 orr x0, x0, #SCTLR_A
64 bic x0, x0, #SCTLR_A
107 orr x0, x0, #1
209 add x0, x0, x2
[all …]
A Dthread_a64.S88 ldr x0, [x0, THREAD_CTX_REGS_X0]
93 ldr x0, [x0, THREAD_CTX_REGS_X0]
230 bic x0, x0, #BIT(TTBR_ASID_SHIFT)
237 add x0, x0, x1
243 ldr x0, [x0]
255 ldr x0, [x0]
267 bic x0, x0, #BIT(TTBR_ASID_SHIFT)
629 ldr x0, [x0]
749 bic x0, x0, x3
752 add x0, x0, x2
[all …]
A Dmisc_a64.S13 mrs x0, mpidr_el1
27 tst x0, #MPIDR_MT_MASK
28 lsl x3, x0, #MPIDR_AFFINITY_BITS
29 csel x3, x3, x0, eq
37 ubfx x0, x3, #MPIDR_AFF1_SHIFT, #MPIDR_AFFINITY_BITS
39 add x0, x0, x1, LSL #(CFG_CORE_CLUSTER_SHIFT)
45 ubfx x0, x3, #MPIDR_AFF0_SHIFT, #MPIDR_AFFINITY_BITS
49 add x0, x0, x1, LSL #(CFG_CORE_THREAD_SHIFT)
A Dtlb_helpers_a64.S21 lsr x0, x0, #TLBI_MVA_SHIFT
23 tlbi vaae1is, x0 /* Invalidate tlb by mva in inner shareable */
31 lsl x0, x0, #TLBI_ASID_SHIFT
33 tlbi aside1is, x0 /* Invalidate tlb by asid in inner shareable */
34 orr x0, x0, #BIT(TLBI_ASID_SHIFT) /* Select the kernel ASID */
35 tlbi aside1is, x0 /* Invalidate tlb by asid in inner shareable */
A Dthread_optee_smc_a64.S59 mov x0, sp
82 mov x1, x0
83 ldr x0, =TEESMC_OPTEED_RETURN_ON_DONE
92 mov x1, x0
102 mov x1, x0
112 mov x1, x0
122 mov x1, x0
132 mov x1, x0
166 mov sp, x0
188 push x0, xzr
[all …]
A Dcache_helpers_a64.S30 add x1, x0, x1
32 bic x0, x0, x3
34 dc \op, x0
35 add x0, x0, x2
36 cmp x0, x1
106 mov x0, x9
228 add x1, x0, x1
230 bic x0, x0, x3
232 ic ivau, x0
233 add x0, x0, x2
[all …]
A Dthread_spmc_a64.S18 mov_imm x0, FFA_MSG_WAIT /* FID */
31 mov_imm x0, FFA_MSG_SEND_DIRECT_RESP_32 /* FID */
41 mov x0, sp
60 mov sp, x0
79 mov x0, sp
87 mov sp, x0
112 push x0, xzr
116 store_xregs x0, THREAD_CTX_REGS_X19, 19, 30
117 mov x19, x0
131 mov sp, x0 /* Switch to tmp stack */
[all …]
A Dspin_lock_a64.S67 l2: ldaxr w1, [x0]
69 stxr w1, w2, [x0]
76 mov x1, x0
88 stlr wzr, [x0]
/optee_os-3.20.0/core/arch/arm/tee/
A Darch_svc_a64.S16 uint64_t x0;
60 lsl x0, x6, #2
62 cmp x1, x0
63 csel x0, x1, x0, ge
64 add x0, x0, #0xf
65 and x0, x0, #0xfffffffffffffff0
73 mov x0, sp
78 cmp x0, #0
88 ldr x0, [x0, #THREAD_SVC_REG_X6]
112 mov x0, x2
[all …]
/optee_os-3.20.0/core/arch/arm/plat-vexpress/
A Djuno_core_pos_a64.S12 and x1, x0, #MPIDR_CPU_MASK
13 and x0, x0, #MPIDR_CLUSTER_MASK
14 eor x0, x0, #(1 << MPIDR_CLUSTER_SHIFT)
15 add x0, x1, x0, LSR #6
/optee_os-3.20.0/core/arch/arm/dts/
A Dfsl-lx2160a.dtsi421 reg = <0x0 0x1080000 0x0 0x1000>;
428 reg = <0x0 0x1090000 0x0 0x1000>;
469 dma-ranges = <0x0 0x0 0x0 0x0 0x10000 0x00000000>;
524 reg = <0x0 0x1e00000 0x0 0x10000>;
530 reg = <0x0 0x1e80000 0x0 0x1000>;
535 reg = <0x0 0x1e90000 0x0 0x1000>;
543 reg = <0x0 0x8b96000 0x0 0x1000>;
554 reg = <0x0 0x8b97000 0x0 0x1000>;
847 reg = <0x0 0x1e34040 0x0 0x1c>;
855 fsl,rcpm-wakeup = <&rcpm 0x0 0x0 0x0 0x0 0x4000 0x0 0x0>;
[all …]
/optee_os-3.20.0/lib/libutils/isoc/arch/arm/
A Dsetjmp_a64.S53 #define REG_PAIR(REG1, REG2, OFFS) stp REG1, REG2, [x0, OFFS]
54 #define REG_ONE(REG1, OFFS) str REG1, [x0, OFFS]
60 add x0, x0, #104
75 #define REG_PAIR(REG1, REG2, OFFS) ldp REG1, REG2, [x0, OFFS]
76 #define REG_ONE(REG1, OFFS) ldr REG1, [x0, OFFS]
78 stp x0, x1, [sp, #-16]!
81 add x0, x0, #104
84 ldp x0, x1, [sp], #16
/optee_os-3.20.0/core/arch/arm/plat-rcar/
A Dcore_pos_a64.S22 tst x0, #MPIDR_MT_MASK
23 lsl x3, x0, #MPIDR_AFFINITY_BITS
24 csel x3, x3, x0, eq
31 ubfx x0, x3, #MPIDR_AFF1_SHIFT, #MPIDR_AFFINITY_BITS
70 add x0, x0, x1
A Dromapi_call.S24 mov x19, x0
30 mov x0, sp
44 mov x23, x0
47 mov x0, #DCACHE_OP_CLEAN
74 mov x0, x20 /* x20: uint64_t arg1 */
/optee_os-3.20.0/lib/libutils/ext/arch/arm/
A Dmcount_a64.S46 adjust_pc x0, x0
51 get_pc x0
63 stp x0, x1, [sp]
70 mov x30, x0
73 ldp x0, x1, [sp]
A Datomic_a64.S11 ldaxr w1, [x0]
13 stxr w2, w1, [x0]
22 ldaxr w1, [x0]
24 stxr w2, w1, [x0]
/optee_os-3.20.0/core/arch/arm/plat-d06/
A Dcore_pos_a64.S22 lsr x1, x0, 8
25 lsr x1, x0, 16
28 lsr x1, x0, 20
45 mov x0, x5
/optee_os-3.20.0/core/arch/arm/plat-marvell/otx2/
A Dcore_pos.S10 ubfx x1, x0, #MPIDR_AFF0_SHIFT, #MPIDR_AFFINITY_BITS
13 ubfx x2, x0, #MPIDR_AFF1_SHIFT, #MPIDR_AFFINITY_BITS
14 add x0, x1, x2
/optee_os-3.20.0/ldelf/
A Dtlsdesc_rel_a64.S17 ldr x0, [x0, #8]
A Dstart_a64.S54 mov x0, #0
56 3: mov x0, #0
/optee_os-3.20.0/lib/libutee/arch/arm/
A Dutee_syscalls_a64.S21 stp x0, x1, [sp, #16]
25 mov x0, x30
27 ldp x0, x1, [sp, #16]
/optee_os-3.20.0/core/lib/libtomcrypt/src/stream/sosemanuk/
A Dsosemanuk.c175 #define SERPENT_LT(x0, x1, x2, x3) do { \ argument
176 x0 = ROLc(x0, 13); \
178 x1 = x1 ^ x0 ^ x2; \
179 x3 = x3 ^ x2 ^ T32(x0 << 3); \
182 x0 = x0 ^ x1 ^ x3; \
184 x0 = ROLc(x0, 5); \
337 #define KA(zc, x0, x1, x2, x3) do { \ in sosemanuk_setiv() argument
338 x0 ^= st->kc[(zc)]; \ in sosemanuk_setiv()
622 dd = s ## x0; \ in s_sosemanuk_internal()
623 s ## x0 = MUL_A(s ## x0) ^ MUL_G(s ## x3) ^ s ## x9; \ in s_sosemanuk_internal()
[all …]
/optee_os-3.20.0/core/lib/libtomcrypt/src/ciphers/
A Didea.c104 ushort16 x0, x1, x2, x3, t0, t1; in s_process_block() local
106 LOAD16(x0, in + 0); in s_process_block()
112 MUL(x0, m_key[i*6+0]); in s_process_block()
116 t0 = x0^x2; in s_process_block()
121 x0 ^= t1; in s_process_block()
128 MUL(x0, m_key[LTC_IDEA_ROUNDS*6+0]); in s_process_block()
133 STORE16(x0, out + 0); in s_process_block()
/optee_os-3.20.0/core/arch/riscv/kernel/
A Dspinlock.S31 amoswap.w x0, x0, 0(a0)

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