Searched refs:CR_L1_DCACHE_SET (Results 1 – 2 of 2) sorted by relevance

/seL4-master/src/arch/arm/64/
A D	head.S	35 #define CR_L1_DCACHE_SET BIT(CONTROL_C) macro 38 #define CR_L1_DCACHE_SET 0 macro 44 CR_L1_DCACHE_SET | \
/seL4-master/src/arch/arm/32/
A D	head.S	35 #define CR_L1_DCACHE_SET BIT(CONTROL_C) macro 38 #define CR_L1_DCACHE_SET 0 macro 52 CR_L1_DCACHE_SET | \

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