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Searched refs:MASK (Results 1 – 25 of 60) sorted by relevance

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/seL4-master/src/arch/arm/armv/armv7-a/
A Dcache.c27 #define LOUU(x) (((x) >> 27) & MASK(3))
28 #define LOC(x) (((x) >> 24) & MASK(3))
29 #define LOUIS(x) (((x) >> 21) & MASK(3))
30 #define CTYPE(x,n) (((x) >> (n*3)) & MASK(3))
57 #define LINEBITS(s) (( (s) & MASK(3)) + 4)
59 #define ASSOC(s) ((((s) >> 3) & MASK(10)) + 1)
61 #define NSETS(s) ((((s) >> 13) & MASK(15)) + 1)
/seL4-master/src/arch/arm/armv/armv8-a/64/
A Dcache.c26 #define LOUU(x) (((x) >> 27) & MASK(3))
27 #define LOC(x) (((x) >> 24) & MASK(3))
28 #define LOUIS(x) (((x) >> 21) & MASK(3))
29 #define CTYPE(x,n) (((x) >> (n*3)) & MASK(3))
51 #define LINEBITS(s) (((s) & MASK(3)) + 4)
52 #define ASSOC(s) ((((s) >> 3) & MASK(10)) + 1)
53 #define NSETS(s) ((((s) >> 13) & MASK(15)) + 1)
/seL4-master/src/arch/arm/armv/armv8-a/32/
A Dcache.c27 #define LOUU(x) (((x) >> 27) & MASK(3))
28 #define LOC(x) (((x) >> 24) & MASK(3))
29 #define LOUIS(x) (((x) >> 21) & MASK(3))
30 #define CTYPE(x,n) (((x) >> (n*3)) & MASK(3))
57 #define LINEBITS(s) (( (s) & MASK(3)) + 4)
59 #define ASSOC(s) ((((s) >> 3) & MASK(10)) + 1)
61 #define NSETS(s) ((((s) >> 13) & MASK(15)) + 1)
/seL4-master/src/arch/arm/64/machine/
A Dfpu.c33 if (((id_aa64pfr0 >> ID_AA64PFR0_EL1_FP) & MASK(4)) == MASK(4) || in fpsimd_HWCapTest()
34 ((id_aa64pfr0 >> ID_AA64PFR0_EL1_ASIMD) & MASK(4)) == MASK(4)) { in fpsimd_HWCapTest()
/seL4-master/src/arch/arm/machine/
A Derrata.c26 uint32_t variant = (proc_id >> 20) & MASK(4); in errata_armA15_773022()
27 uint32_t revision = proc_id & MASK(4); in errata_armA15_773022()
28 uint32_t part = (proc_id >> 4) & MASK(12); in errata_armA15_773022()
/seL4-master/include/arch/arm/arch/machine/
A Dhardware.h19 #define PAGE_BASE(_p, _s) ((_p) & ~MASK(pageBitsForSize((_s))))
20 #define PAGE_OFFSET(_p, _s) ((_p) & MASK(pageBitsForSize((_s))))
21 #define IS_PAGE_ALIGNED(_p, _s) (((_p) & MASK(pageBitsForSize((_s)))) == 0)
A Dtlb.h41 SMP_COND_STATEMENT(doRemoteInvalidateTranslationSingle(vptr, MASK(CONFIG_MAX_NUM_NODES))); in invalidateTranslationSingle()
47 SMP_COND_STATEMENT(doRemoteInvalidateTranslationASID(hw_asid, MASK(CONFIG_MAX_NUM_NODES))); in invalidateTranslationASID()
53 SMP_COND_STATEMENT(doRemoteInvalidateTranslationAll(MASK(CONFIG_MAX_NUM_NODES))); in invalidateTranslationAll()
/seL4-master/include/arch/x86/arch/64/mode/object/
A Dstructures.h61 #define GET_PML4_INDEX(x) ( ((x) >> (PML4_INDEX_OFFSET)) & MASK(PML4_INDEX_BITS))
63 #define GET_PDPT_INDEX(x) ( ((x) >> (PDPT_INDEX_OFFSET)) & MASK(PDPT_INDEX_BITS))
64 #define GET_PD_INDEX(x) ( ((x) >> (PD_INDEX_OFFSET)) & MASK(PD_INDEX_BITS))
65 #define GET_PT_INDEX(x) ( ((x) >> (PT_INDEX_OFFSET)) & MASK(PT_INDEX_BITS))
111 #define ASID_LOW(a) (a & MASK(asidLowBits))
112 #define ASID_HIGH(a) ((a >> asidLowBits) & MASK(asidHighBits))
/seL4-master/include/arch/arm/arch/64/mode/object/
A Dstructures.h68 #define GET_PGD_INDEX(x) (((x) >> (PGD_INDEX_OFFSET)) & MASK(PGD_INDEX_BITS))
69 #define GET_PUD_INDEX(x) (((x) >> (PUD_INDEX_OFFSET)) & MASK(PUD_INDEX_BITS))
70 #define GET_UPUD_INDEX(x) (((x) >> (PUD_INDEX_OFFSET)) & MASK(UPUD_INDEX_BITS))
71 #define GET_PD_INDEX(x) (((x) >> (PD_INDEX_OFFSET)) & MASK(PD_INDEX_BITS))
72 #define GET_PT_INDEX(x) (((x) >> (PT_INDEX_OFFSET)) & MASK(PT_INDEX_BITS))
119 #define ASID_LOW(a) (a & MASK(asidLowBits))
120 #define ASID_HIGH(a) ((a >> asidLowBits) & MASK(asidHighBits))
/seL4-master/include/arch/arm/arch/64/mode/kernel/
A Dvspace.h23 #define VTABLE_VMID_SLOT MASK(seL4_VSpaceIndexBits)
31 #define VTABLE_SMMU_SLOT (MASK(seL4_VSpaceIndexBits) - 1)
91 poolPtr->array[asid & MASK(asidLowBits)] = in performASIDPoolInvocation()
94 vspace_root_t *vtable = poolPtr->array[asid & MASK(asidLowBits)]; in performASIDPoolInvocation()
135 poolPtr->array[asid & MASK(asidLowBits)] = in performASIDPoolInvocation()
139 vspace_root_t *vtable = poolPtr->array[asid & MASK(asidLowBits)]; in performASIDPoolInvocation()
/seL4-master/include/object/
A Dstructures.h98 (((cte_t *)((word_t)(p)&~MASK(seL4_TCBBits)))+(i))
110 #define ZombieType_ZombieCNode(n) ((n) & MASK(wordRadix))
117 mask = MASK(TCB_CNODE_RADIX + 1); in Zombie_new()
119 mask = MASK(type + 1); in Zombie_new()
137 return cap_zombie_cap_get_capZombieID(cap) & MASK(radix + 1); in cap_zombie_cap_get_capZombieNumber()
143 return cap_zombie_cap_get_capZombieID(cap) & ~MASK(radix + 1); in cap_zombie_cap_get_capZombiePtr()
149 word_t ptr = cap_zombie_cap_get_capZombieID(cap) & ~MASK(radix + 1); in cap_zombie_cap_set_capZombieNumber()
150 return cap_zombie_cap_set_capZombieID(cap, ptr | (n & MASK(radix + 1))); in cap_zombie_cap_set_capZombieNumber()
/seL4-master/include/arch/arm/arch/32/mode/fastpath/
A Dfastpath.h77 return (pd_cap.words[0] & MASK(5)) == in isValidVTableRoot_fp()
90 return ((msgInfo & MASK(seL4_MsgLengthBits + seL4_MsgExtraCapBits)) in fastpath_mi_check()
91 + 3) & ~MASK(3); in fastpath_mi_check()
110 return (cap.words[0] & MASK(5)) == cap_reply_cap; in fastpath_reply_cap_check()
/seL4-master/src/arch/riscv/machine/
A Dcapdl.c59 word_t ptSlotIndex = ((i >> ptBitsLeft) & MASK(PT_INDEX_BITS)); in riscv_cap_pt_print_slots()
73 word_t ptSlotIndex = ((i >> ptBitsLeft) & MASK(PT_INDEX_BITS)); in riscv_cap_pt_print_slots()
118 word_t slot = ((vptr >> lu_ret.ptBitsLeft) & MASK(PT_INDEX_BITS)); in cap_frame_print_attrs_vptr()
133 word_t slot = ((vptr >> ptBitsLeft) & MASK(PT_INDEX_BITS)); in print_cap_arch()
201 word_t ptIndex = ((i >> ptBitsLeft) & MASK(PT_INDEX_BITS)); in riscv_obj_pt_print_slots()
/seL4-master/src/plat/pc99/machine/
A Dioapic.c64 …IOAPIC_WINDOW) & MASK(IOREDTBL_HIGH_RESERVED_BITS)) | (delivery_cpu << IOREDTBL_HIGH_RESERVED_BITS… in single_ioapic_init()
69 ioredtbl_state[i] |= ioapic_read(ioapic, IOAPIC_WINDOW) & ~MASK(16); in single_ioapic_init()
154 ioredtbl_high = ioapic_read(ioapic, IOAPIC_WINDOW) & MASK(IOREDTBL_HIGH_RESERVED_BITS); in ioapic_map_pin_to_vector()
166 ioredtbl_state[index] |= ioapic_read(ioapic, IOAPIC_WINDOW) & ~MASK(16); in ioapic_map_pin_to_vector()
/seL4-master/include/arch/arm/arch/32/mode/object/
A Dstructures.h107 #define ASID_LOW(a) (a & MASK(asidLowBits))
108 #define ASID_HIGH(a) ((a >> asidLowBits) & MASK(asidHighBits))
113 asid & MASK(asidLowBits)); in cap_small_frame_cap_set_capFMappedASID()
115 (asid >> asidLowBits) & MASK(asidHighBits)); in cap_small_frame_cap_set_capFMappedASID()
127 asid & MASK(asidLowBits)); in cap_frame_cap_set_capFMappedASID()
129 (asid >> asidLowBits) & MASK(asidHighBits)); in cap_frame_cap_set_capFMappedASID()
/seL4-master/src/arch/arm/32/kernel/
A Dvspace.c615 pd = poolPtr->array[asid & MASK(asidLowBits)]; in findPDForASID()
1081 pd = asidPool->array[asid & MASK(asidLowBits)]; in invalidateASID()
1216 addr = (addressTranslateS1CPR(addr) & ~MASK(PAGE_BITS)) | (addr & MASK(PAGE_BITS)); in handleVMFault()
1247 pc = (addressTranslateS1CPR(pc) & ~MASK(PAGE_BITS)) | (pc & MASK(PAGE_BITS)); in handleVMFault()
1283 assert((asid_base & MASK(asidLowBits)) == 0); in deleteASIDPool()
1475 base_addr = vptr & ~MASK(12);
1544 return (w & MASK(pageBitsForSize(sz))) == 0;
1744 return vaddr & ~MASK(pageBitsForSize(size));
1968 poolPtr->array[asid & MASK(asidLowBits)] =
1989 assert((asid_base & MASK(asidLowBits)) == 0);
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/seL4-master/include/arch/x86/arch/object/
A Dstructures.h79 #define GET_EPT_PML4_INDEX(x) ( (((uint64_t)(x)) >> (EPT_PML4_INDEX_OFFSET)) & MASK(EPT_PML4_INDEX_…
80 #define GET_EPT_PDPT_INDEX(x) ( ((x) >> (EPT_PDPT_INDEX_OFFSET)) & MASK(EPT_PDPT_INDEX_BITS))
81 #define GET_EPT_PD_INDEX(x) ( ((x) >> (EPT_PD_INDEX_OFFSET)) & MASK(EPT_PD_INDEX_BITS))
82 #define GET_EPT_PT_INDEX(x) ( ((x) >> (EPT_PT_INDEX_OFFSET)) & MASK(EPT_PT_INDEX_BITS))
/seL4-master/src/arch/arm/api/
A Dfaults.c40 ipa = (addressTranslateS1CPR(va) & ~MASK(PAGE_BITS)) | (va & MASK(PAGE_BITS)); in Arch_setMRs_fault()
/seL4-master/include/arch/riscv/arch/object/
A Dstructures.h33 #define ASID_LOW(a) (a & MASK(asidLowBits))
34 #define ASID_HIGH(a) ((a >> asidLowBits) & MASK(asidHighBits))
/seL4-master/include/arch/x86/arch/32/mode/object/
A Dstructures.h59 #define ASID_LOW(a) (a & MASK(asidLowBits))
60 #define ASID_HIGH(a) ((a >> asidLowBits) & MASK(asidHighBits))
/seL4-master/src/arch/x86/object/
A Dioport.c61 int low_index = first_port & MASK(wordRadix); in isIOPortRangeFree()
62 int high_index = last_port & MASK(wordRadix); in isIOPortRangeFree()
318 int low_index = low & MASK(wordRadix); in setIOPortMask()
319 int high_index = high & MASK(wordRadix); in setIOPortMask()
/seL4-master/src/kernel/
A Dcspace.c156 guard = (capptr >> ((n_bits - guardBits) & MASK(wordRadix))) & MASK(guardBits); in resolveAddressBits()
171 offset = (capptr >> (n_bits - levelBits)) & MASK(radixBits); in resolveAddressBits()
/seL4-master/include/drivers/irq/
A Dbcm2836-armctrl-ic.h120 #define LOCAL_TIMER_CTRL_RL_MASK MASK(28)
132 pending &= MASK(12); in isIRQPending()
/seL4-master/src/arch/x86/32/kernel/
A Dvspace_32paging.c138 *(pt + ((vptr & MASK(seL4_LargePageBits)) >> seL4_PageBits)) = pte_new( in map_it_frame_cap()
213 poolPtr->array[asid & MASK(asidLowBits)] = asid_map; in performASIDPoolInvocation()
330 offset = vaddr & MASK(seL4_LargePageBits); in readWordFromVSpace()
335 offset = vaddr & MASK(seL4_PageBits); in readWordFromVSpace()
/seL4-master/include/arch/arm/arch/32/mode/
A Dhardware.h75 #define KERNEL_ELF_BASE (USER_TOP + (KERNEL_ELF_PADDR_BASE & MASK(22)))

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