1 /* 2 * Copyright 2020, Data61, CSIRO (ABN 41 687 119 230) 3 * 4 * SPDX-License-Identifier: GPL-2.0-only 5 */ 6 7 #include <config.h> 8 #include <stdint.h> 9 #include <util.h> 10 #include <machine/io.h> 11 12 /* When DLAB=1, MU_IO is a baud rate register. 13 * Otherwise, write to TX, read to RX */ 14 #define MU_IO 0x00 15 /* When DLAB=1, MU_IIR is a baud rate register. 16 * Otherwise IRQ enable */ 17 #define MU_IIR 0x04 18 #define MU_IER 0x08 19 #define MU_LCR 0x0C 20 #define MU_MCR 0x10 21 #define MU_LSR 0x14 22 #define MU_MSR 0x18 23 #define MU_SCRATCH 0x1C 24 #define MU_CNTL 0x20 25 26 /* This bit is set if the transmit FIFO can accept at least one byte.*/ 27 #define MU_LSR_TXEMPTY BIT(5) 28 /* This bit is set if the transmit FIFO is empty and the 29 * transmitter is idle. (Finished shifting out the last bit). */ 30 #define MU_LSR_TXIDLE BIT(6) 31 #define MU_LSR_RXOVERRUN BIT(1) 32 #define MU_LSR_DATAREADY BIT(0) 33 #define MU_LCR_DLAB BIT(7) 34 #define MU_LCR_BREAK BIT(6) 35 #define MU_LCR_DATASIZE BIT(0) 36 37 #define UART_REG(x) ((volatile uint32_t *)(UART_PPTR + (x))) 38 39 #ifdef CONFIG_PRINTING uart_drv_putchar(unsigned char c)40void uart_drv_putchar(unsigned char c) 41 { 42 while (!(*UART_REG(MU_LSR) & MU_LSR_TXIDLE)); 43 *UART_REG(MU_IO) = (c & 0xff); 44 } 45 #endif /* CONFIG_PRINTING */ 46 47 #ifdef CONFIG_DEBUG_BUILD uart_drv_getchar(void)48unsigned char uart_drv_getchar(void) 49 { 50 while (!(*UART_REG(MU_LSR) & MU_LSR_DATAREADY)); 51 return *UART_REG(MU_IO); 52 } 53 #endif /* CONFIG_DEBUG_BUILD */ 54