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/seL4-master/tools/hardware/
A Dmemory.py16 self.base = base
32 self.base,
37 return self.base == other.base and self.size == other.size
44 return self.base > other.base
61 return (self.base <= other.base and (self.base + self.size) > other.base) \
62 or (other.base <= self.base and (other.base + other.size) > self.base)
71 if self.base < excluded.base:
73 ret.append(Region.from_range(self.base, excluded.base, self.owner))
76 if (excluded.base + excluded.size) < (self.base + self.size):
82 if (self.base + self.size) > (excluded.base + excluded.size):
[all …]
A Dconfig.py62 resv = Region(ret[0].base, new.base - ret[0].base)
66 physBase = ret[0].base
87 physBase = ret[0].base
89 resv = Region(ret[0].base, self.get_bootloader_reserve())
91 ret[0].base += self.get_bootloader_reserve()
/seL4-master/include/arch/x86/arch/32/mode/
A Dmachine.h122 static inline void FORCE_INLINE x86_write_fs_base_impl(word_t base) in x86_write_fs_base_impl() argument
124 …_gdt_data_ptr_set_base_low(&x86KSGlobalState[CURRENT_CPU_INDEX()].x86KSgdt[GDT_FS], base & 0xFFFF); in x86_write_fs_base_impl()
136 static inline void FORCE_INLINE x86_write_gs_base_impl(word_t base) in x86_write_gs_base_impl() argument
138 …_gdt_data_ptr_set_base_low(&x86KSGlobalState[CURRENT_CPU_INDEX()].x86KSgdt[GDT_GS], base & 0xFFFF); in x86_write_gs_base_impl()
152 word_t base = 0; in x86_read_fs_base_impl() local
153base &= gdt_entry_gdt_data_ptr_get_base_low(&x86KSGlobalState[CURRENT_CPU_INDEX()].x86KSgdt[GDT_FS… in x86_read_fs_base_impl()
156 return base; in x86_read_fs_base_impl()
161 word_t base = 0; in x86_read_gs_base_impl() local
165 return base; in x86_read_gs_base_impl()
170 static inline void x86_write_gs_base_impl(word_t base) in x86_write_gs_base_impl() argument
[all …]
/seL4-master/include/arch/x86/arch/64/mode/
A Dmachine.h248 static inline void x86_write_fs_base_impl(word_t base) in x86_write_fs_base_impl() argument
250 asm volatile("wrfsbase %0"::"r"(base)); in x86_write_fs_base_impl()
255 word_t base = 0; in x86_read_fs_base_impl() local
256 asm volatile("rdfsbase %0":"=r"(base)); in x86_read_fs_base_impl()
257 return base; in x86_read_fs_base_impl()
296 x86_wrmsr(IA32_KERNEL_GS_BASE_MSR, base); in x86_write_gs_base_impl()
308 asm volatile("wrgsbase %0"::"r"(base)); in x86_write_gs_base_impl()
313 word_t base = 0; in x86_read_gs_base_impl() local
314 asm volatile("rdgsbase %0":"=r"(base)); in x86_read_gs_base_impl()
315 return base; in x86_read_gs_base_impl()
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/seL4-master/include/object/
A Duntyped.h25 #define GET_FREE_REF(base,freeIndex) ((word_t)(((word_t)(base)) + FREE_INDEX_TO_OFFSET(freeIndex))) argument
26 #define GET_FREE_INDEX(base,free) (((word_t)(free) - (word_t)(base))>>seL4_MinUntypedBits) argument
27 #define GET_OFFSET_FREE_PTR(base, offset) ((void *)(((word_t)(base)) + (offset))) argument
/seL4-master/libsel4/tools/
A Dbitfield_gen.py45 def return_name(base): argument
50 def var_name(name, base): argument
1320 self.base = base
1351 "base": self.base}
1686 if size < self.base:
1863 if size < self.base:
2212 self.base = base
2216 if self.size % base != 0:
2221 if offset // base != (offset+size-1) // base:
2479 if size < self.base:
[all …]
/seL4-master/tools/
A Dbitfield_gen.py45 def return_name(base): argument
50 def var_name(name, base): argument
1320 self.base = base
1351 "base": self.base}
1686 if size < self.base:
1863 if size < self.base:
2212 self.base = base
2216 if self.size % base != 0:
2221 if offset // base != (offset+size-1) // base:
2479 if size < self.base:
[all …]
A Dflags.cmake9 # Set the cmake compilation flags with kernel base flags
A Dbf.vim14 syn keyword BFKeyword base block field field_high mask padding tag tagged_union
/seL4-master/include/arch/x86/arch/
A Dmachine.h242 static inline void x86_write_fs_base_impl(word_t base);
244 static inline void x86_write_gs_base_impl(word_t base);
249 static inline void x86_write_fs_base_impl(word_t base) in x86_write_fs_base_impl() argument
251 x86_wrmsr(IA32_FS_BASE_MSR, base); in x86_write_fs_base_impl()
272 static inline void x86_write_fs_base(word_t base, cpu_id_t cpu) in x86_write_fs_base() argument
274 x86_write_fs_base_impl(base); in x86_write_fs_base()
277 static inline void x86_write_gs_base(word_t base, cpu_id_t cpu) in x86_write_gs_base() argument
279 x86_write_gs_base_impl(base); in x86_write_gs_base()
297 static inline void x86_write_fs_base(word_t base, cpu_id_t cpu) in x86_write_fs_base() argument
301 x86_write_fs_base_impl(base); in x86_write_fs_base()
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/seL4-master/tools/hardware/utils/
A Dmemory.py37 if dnreg['region'].base == dreg['region'].base + dreg['region'].size:
40 elif dreg['region'].base == dnreg['region'].base + dnreg['region'].size:
53 contiguous_regions.add(Region(reg['region'].base, size, reg['region'].owner))
114 return sorted(ret, key=lambda a: a.base)
A Drule.py51 self.base = aligned.base
53 self.labels[kernel_name] = region.base - aligned.base
101 return other.base == self.base and other.size == self.size
/seL4-master/include/
A Dcompound_types.h15 pde_t *base; member
21 pte_t *base; member
/seL4-master/src/drivers/smmu/
A Dsmmuv2.c57 static inline uint32_t smmu_read_reg32(pptr_t base, uint32_t index) in smmu_read_reg32() argument
59 return *(volatile uint32_t *)(base + index); in smmu_read_reg32()
62 static inline void smmu_write_reg32(pptr_t base, uint32_t index, uint32_t val) in smmu_write_reg32() argument
64 *(volatile uint32_t *)(base + index) = val; in smmu_write_reg32()
67 static inline uint64_t smmu_read_reg64(pptr_t base, uint32_t index) in smmu_read_reg64() argument
69 return *(volatile uint64_t *)(base + index); in smmu_read_reg64()
72 static inline void smmu_write_reg64(pptr_t base, uint32_t index, uint64_t val) in smmu_write_reg64() argument
74 *(volatile uint64_t *)(base + index) = val; in smmu_write_reg64()
77 static void smmu_tlb_sync(pptr_t base, uint32_t sync, uint32_t status) in smmu_tlb_sync() argument
80 smmu_write_reg32(base, sync, SMMU_TLB_SYNC_MASK); in smmu_tlb_sync()
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/seL4-master/src/
A Dutil.c104 unsigned int base; in str_to_long() local
111 base = 16; in str_to_long()
114 base = 10; in str_to_long()
124 if (res == -1 || res >= base) { in str_to_long()
127 val = val * base + res; in str_to_long()
/seL4-master/src/arch/arm/32/kernel/
A Dvspace.c1563 (paddr_t base, word_t vaddr, vm_page_size_t frameSize, argument
1578 ret.pte = makeUserPTE(ARMSmallPage, base,
1595 ret.pte_entries.base = lu_ret.ptSlot;
1618 ret.pte = makeUserPTE(ARMLargePage, base,
1635 ret.pte_entries.base = lu_ret.ptSlot;
1678 ret.pde = makeUserPDE(ARMSection, base,
1708 ret.pde = makeUserPDE(ARMSuperSection, base,
1869 pte_entries.base[i] = pte;
1871 cleanCacheRange_PoU((word_t)pte_entries.base,
1903 pde_entries.base[i] = pde;
[all …]
/seL4-master/tools/hardware/outputs/
A Dyaml.py21 'start': r.base,
22 'end': r.base + r.size
/seL4-master/include/drivers/irq/
A Dam335x.h18 #define CMPER_REG(base, off) ((volatile uint32_t *)((base) + (off))) argument
/seL4-master/src/drivers/timer/
A Dam335x-timer.c31 #define WDT_REG(base, off) ((volatile uint32_t *)((base) + (off))) argument
/seL4-master/include/arch/arm/arch/64/mode/object/
A Dstructures.bf8 -- Default base size: uint64_t
10 base 64(48,0)
12 base 64(48,1)
243 base 64(48,0)
/seL4-master/libsel4/mode_include/64/sel4/
A Dshared_types.bf9 base 64
/seL4-master/include/arch/riscv/arch/32/mode/object/
A Dstructures.bf10 ---- Default base size: uint32_t
11 base 32
/seL4-master/libsel4/mode_include/32/sel4/
A Dshared_types.bf9 base 32
/seL4-master/src/plat/pc99/machine/
A Dintel-vtd.c291 rmrr_list->entries[i].base != filtered.entries[filtered.num - 1].base && in vtd_get_n_paging()
306 .start = filtered.entries[j].base, in vtd_get_n_paging()
388 …for (addr = rmrr_list->entries[i].base; addr < rmrr_list->entries[i].limit; addr += BIT(seL4_PageB… in vtd_create_context_table()
/seL4-master/include/plat/pc99/plat/64/plat_mode/machine/
A Dhardware.bf9 base 64

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