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/seL4-master/src/
A Dutil.c208 x >>= bits; // <= 0x0000ffff in clz32()
209 count -= bits; // [16, 32] in clz32()
215 x >>= bits; // <= 0x000000ff in clz32()
216 count -= bits; // [8, 16, 24, 32] in clz32()
222 x >>= bits; // <= 0x0000000f in clz32()
229 x >>= bits; // <= 0x00000003 in clz32()
230 count -= bits; // [2, 4, 6, ..., 32] in clz32()
236 x >>= bits; // <= 0x00000001 in clz32()
237 count -= bits; // [1, 2, 3, ..., 32] in clz32()
260 count -= bits; // [32, 64] in clz64()
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/seL4-master/tools/hardware/utils/
A D__init__.py8 def align_up(num, bits): argument
10 boundary = 1 << bits
14 def align_down(num, bits): argument
16 boundary = 1 << bits
/seL4-master/include/arch/arm/arch/
A Dmachine.h46 static inline void clearMemory(word_t *ptr, word_t bits) in clearMemory() argument
48 memzero(ptr, BIT(bits)); in clearMemory()
49 cleanCacheRange_RAM((word_t)ptr, (word_t)ptr + BIT(bits) - 1, in clearMemory()
54 static inline void clearMemory_PT(word_t *ptr, word_t bits) in clearMemory_PT() argument
56 memzero(ptr, BIT(bits)); in clearMemory_PT()
57 cleanCacheRange_PoU((word_t)ptr, (word_t)ptr + BIT(bits) - 1, in clearMemory_PT()
/seL4-master/include/fastpath/
A Dfastpath.h14 word_t guardBits, radixBits, bits; in lookup_fp() local
17 bits = 0; in lookup_fp()
26 cptr2 = cptr << bits; in lookup_fp()
42 bits += guardBits + radixBits; in lookup_fp()
44 } while (unlikely(bits < wordBits && cap_capType_equals(cap, cap_cnode_cap))); in lookup_fp()
46 if (unlikely(bits > wordBits)) { in lookup_fp()
/seL4-master/include/kernel/
A Dboot.h117 static inline BOOT_CODE word_t get_n_paging(v_region_t v_reg, word_t bits) in get_n_paging() argument
119 vptr_t start = ROUND_DOWN(v_reg.start, bits); in get_n_paging()
120 vptr_t end = ROUND_UP(v_reg.end, bits); in get_n_paging()
121 return (end - start) / BIT(bits); in get_n_paging()
/seL4-master/libsel4/include/sel4/
A Ddeprecated.h125 … seL4_Word bits) in seL4_CapData_Guard_new() argument
127 return seL4_CNode_CapData_new(guard, bits).words[0]; in seL4_CapData_Guard_new()
/seL4-master/manual/parts/
A Dcspace.tex345 significant bits of the capability address. If the two values are
347 most-significant \emph{radix} bits of the capability address as an
352 there are remaining bits (following the \emph{radix} bits) in the
355 remaining bits of the capability address. Otherwise, the lookup
380 where there are some bits remaining to be translated;
382 where there are no bits remaining to be translated; and
408 \textit{depth} least significant bits are used in translation.
445 address terminates after the first 24 bits.
451 address leaves 0 bits untranslated.
459 the depth limit, which is the maximum number of bits to be
[all …]
A Dvspace.tex36 The size and type of structure at each level, and the number of bits in the virtual address resolved
61 Structures at both levels are indexed by 10 bits in the virtual address.
73 defined, as shown in the table below. All structures are indexed with 9 bits of the virtual
104 \texttt{PageGlobalDirectory}. All paging structures are index by 9 bits of the virtual address.
122 32-bit RISC-V \texttt{PageTables} are indexed by 10 bits of virtual address.
133 64-bit RISC-V follows the SV39 model, where \texttt{PageTables} are indexed by 9 bits of virtual ad…
A Dio.tex149 PCI identifier of the device as the low 16 bits of the \texttt{badge} argument, and
150 a Domain ID as the high 16 bits of the \texttt{badge} argument.
153 a 16-bit quantity. The first 8 bits identify the bus that the device is on.
154 The next 5 bits are the device identifier: the number of the device on
155 the bus. The last 3 bits are the function number. A single device may
211 The specificiation allows StreamIDs to be up to 16bits wide. There are also a
434 stage 1 translation, as there are a large number of ASID bits and an ASID can be
436 only has 8 bits, and the kernel allocates them on demand and can reclaim a
A Dipc.tex65 \ipcparam{seL4\_Word}{}{receiveDepth}{Number of bits of
136 On 32-bit platforms, only the low 28 bits of the badge are available for use.
137 The kernel will silently ignore any usage of the high 4 bits.
138 On 64-bit platforms, 64 bits are available for badges.
156 These fields specify the root CNode, capability address and number of bits to resolve, respectively…
A Dnotifications.tex33 multiple semaphores (those indicated by the bits set in the badge).
A Dbootup.tex27 the number of bits in the architecture (32 bits or 64 bits). This means, the
A Dthreads.tex353 For some registers, the kernel will silently mask certain bits or ranges of bits off, and force the…
580 occurred. & \ipcbloc{seL4\_TimeoutFault\_Data} \\ Upper 32-bits of
582 \ipcbloc{seL4\_TimeoutFault\_Consumed} \\ Lower 32-bits of microseconds
/seL4-master/include/arch/riscv/arch/
A Dmachine.h144 static inline void clearMemory(void *ptr, unsigned int bits) in clearMemory() argument
146 memzero(ptr, BIT(bits)); in clearMemory()
/seL4-master/src/arch/riscv/
A Dconfig.cmake57 # so limit the maximum paddr to 32-bits.
64 # but structures.bf limits us to using 39 of those bits.
/seL4-master/tools/dts/
A Dariane.dts109 xlnx,num-ss-bits = <0x1>;
110 xlnx,num-transfer-bits = <0x8>;
/seL4-master/src/arch/x86/32/
A Dhead.S29 # Enable caches by clearing bits 29 and 30 of CR0
/seL4-master/src/arch/arm/
A Dconfig.cmake31 # For Cortex-A72 in AArch64 state, the physical address range is 44 bits
147 Cortex-A9 the bits used to enable the prefetchers \
217 # Thus, 6 bits are needed.
/seL4-master/include/arch/x86/arch/
A Dmachine.h341 static inline void clearMemory(void *ptr, unsigned int bits) in clearMemory() argument
343 memzero(ptr, BIT(bits)); in clearMemory()
/seL4-master/include/arch/riscv/arch/64/mode/object/
A Dstructures.bf121 -- This is because Sv32 supports up to 34 bits of physical addressing and we
/seL4-master/src/arch/x86/
A Dconfig.cmake172 support. The CPU must support all bits in this feature mask. Current known bits are \
223 "The bits per pixel of the linear graphics mode ot request. Value of zero indicates \
/seL4-master/src/arch/x86/object/
A Dvcpu.c164 static void print_bits(word_t bits) in print_bits() argument
167 while (bits) { in print_bits()
168 int index = seL4_WordBits - 1 - clzl(bits); in print_bits()
175 bits &= ~BIT(index); in print_bits()
/seL4-master/include/object/
A Dstructures_32.bf307 -- So we just use 4 bits to cater for both.
A Dstructures_64.bf408 -- So we just use 4 bits to cater for both.
/seL4-master/
A Dgdb-macros443 … printf "warning: terminating because node is not a CNode, not because all bits were resolved\n"
744 printf "Error: bits 63:39 must be 0\n"
769 If the PRESENT bit is 0 then the rest of the bits can be anything

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