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/seL4-master/src/arch/x86/64/machine/
A Dregisterset.c39 context->registers[RAX] = 0; in Mode_initContext()
40 context->registers[RBX] = 0; in Mode_initContext()
41 context->registers[RCX] = 0; in Mode_initContext()
42 context->registers[RDX] = 0; in Mode_initContext()
43 context->registers[RSI] = 0; in Mode_initContext()
44 context->registers[RDI] = 0; in Mode_initContext()
45 context->registers[RBP] = 0; in Mode_initContext()
46 context->registers[R8] = 0; in Mode_initContext()
47 context->registers[R9] = 0; in Mode_initContext()
48 context->registers[R10] = 0; in Mode_initContext()
[all …]
/seL4-master/src/arch/x86/machine/
A Dregisterset.c10 void Arch_initContext(user_context_t *context) in Arch_initContext() argument
12 Mode_initContext(context); in Arch_initContext()
13 context->registers[FS_BASE] = 0; in Arch_initContext()
14 context->registers[GS_BASE] = 0; in Arch_initContext()
15 context->registers[Error] = 0; in Arch_initContext()
16 context->registers[FaultIP] = 0; in Arch_initContext()
18 context->registers[CS] = SEL_CS_3; in Arch_initContext()
19 context->registers[FLAGS] = FLAGS_USER_DEFAULT; in Arch_initContext()
20 context->registers[SS] = SEL_DS_3; in Arch_initContext()
22 Arch_initFpuContext(context); in Arch_initContext()
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A Dfpu.c16 void Arch_initFpuContext(user_context_t *context) in Arch_initFpuContext() argument
18 context->fpuState = x86KSnullFpuState; in Arch_initFpuContext()
/seL4-master/src/arch/x86/32/machine/
A Dregisterset.c42 void Mode_initContext(user_context_t *context) in Mode_initContext() argument
44 context->registers[EAX] = 0; in Mode_initContext()
45 context->registers[EBX] = 0; in Mode_initContext()
46 context->registers[ECX] = 0; in Mode_initContext()
47 context->registers[EDX] = 0; in Mode_initContext()
48 context->registers[ESI] = 0; in Mode_initContext()
49 context->registers[EDI] = 0; in Mode_initContext()
50 context->registers[EBP] = 0; in Mode_initContext()
51 context->registers[ESP] = 0; in Mode_initContext()
/seL4-master/manual/parts/
A Dio.tex191 SMMU translation context bank (CB). A translation context bank can perform
217 context banks, bind context banks to page translation structures, implement
227 track which VSpace a context bank has bound to it, and which context bank a
253 single context bank.
289 context banks. Currently only direct mapping of a StreamID to a context bank is
295 Each context bank allows the SMMU to maintain an active translation context with
396 context banks.
422 context bank.
428 context banks using the ASID, and conducts TLB invalidation in those context banks.
453 \item Invalid context fault.
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A Dthreads.tex19 With MCS, a scheduling context is represented by a scheduling context object
21 scheduling context.
54 scheduling context object.
59 derived from the scheduling context object.
186 Threads can be unbound from a scheduling context with
201 time. Threads run on the node that their scheduling context is configured for. Scheduling context
228 holds the scheduling context, the scheduling context will be returned to the caller. However, if in
237 scheduling context, B's reply cap to A is revoked, then the scheduling context will remain with C.
239 invoked, the scheduling context will return to A.
254 the scheduling context that is bound to the notification object. The scheduling context is returned
[all …]
A Dbootup.tex17 On the MCS kernel, the initial thread is configured with a round-robin scheduling context
63 \texttt{seL4\_CapInitThreadSC} & initial thread's scheduling context (MCS only) \\
A Dobjects.tex160 context; see \autoref{sec:scheduling_contexts}.
284 allows scheduling context to be populated with parameters, which combined with priority
301 context donation and provide a container for single-use reply capabilities.
/seL4-master/include/arch/arm/arch/32/mode/machine/
A Ddebug.h31 typedef void (*break_handler_t)(user_context_t *context);
33 void software_breakpoint(uint32_t va, user_context_t *context) VISIBLE;
34 void breakpoint_multiplexer(uint32_t va, user_context_t *context) VISIBLE;
50 typedef void (*catch_handler_t)(user_context_t *context, vector_t vector);
A Dregisterset.h238 void Arch_initBreakpointContext(user_context_t *context);
241 static inline void Arch_initContext(user_context_t *context) in Arch_initContext() argument
243 context->registers[CPSR] = CPSR_USER; in Arch_initContext()
245 Arch_initBreakpointContext(context); in Arch_initContext()
/seL4-master/include/arch/x86/arch/machine/
A Dregisterset.h76 void Mode_initContext(user_context_t *context);
77 void Arch_initContext(user_context_t *context);
A Dfpu.h47 void Arch_initFpuContext(user_context_t *context);
A Ddebug.h30 void Arch_initBreakpointContext(user_breakpoint_state_t *context);
/seL4-master/include/arch/riscv/arch/machine/
A Dregisterset.h119 static inline void Arch_initContext(user_context_t *context) in Arch_initContext() argument
122 context->registers[SSTATUS] = SSTATUS_SPIE; in Arch_initContext()
/seL4-master/include/arch/arm/arch/64/mode/machine/
A Dregisterset.h263 static inline void Arch_initContext(user_context_t *context) in Arch_initContext() argument
265 context->registers[SPSR_EL1] = PSTATE_USER; in Arch_initContext()
/seL4-master/src/arch/arm/
A Dconfig.cmake104 context for performance (or other) reasons, we can just turn them off \
177 "Enable hardware VFP and SIMD context switch \
178 This enables the VFP and SIMD context switch on platforms with \
/seL4-master/
A Dgdb-macros597 "Decodes a vtd context entry into its component parts. arg0: pointer to the entry"
608 "Print the fields of an earlier decoded vtd context entry"
625 …s all of the fields in a vtd context table. There is one entry for each (dev, fn) in the bus. arg0…
701 printf "Error: context entry not present\n"
A Dconfig.cmake488 "Specifies a static maximum to which scheduling context can have \
/seL4-master/src/arch/x86/
A Dconfig.cmake328 "Performs a IBPB on every context switch to prevent Spectre attacks between user
332 other cores retraining the branch predictor even after context switch."
339 "Flushes the RSB on context switch to prevent Spectre attacks between user processes.
/seL4-master/libsel4/tools/
A Dbitfield_gen.py2120 context = "masks for %s.%s" % (self.name, self.tagname)
2126 % (context, uw))
2132 % (context, mw))
2140 .format(context, w, self.represent_class(w),
2145 context, widths[0]))
2149 raise ValueError("%s: there is a non-final duplicate!" % context)
2159 context, classes[w], w, pre_mask, pre_width))
/seL4-master/tools/
A Dbitfield_gen.py2120 context = "masks for %s.%s" % (self.name, self.tagname)
2126 % (context, uw))
2132 % (context, mw))
2140 .format(context, w, self.represent_class(w),
2145 context, widths[0]))
2149 raise ValueError("%s: there is a non-final duplicate!" % context)
2159 context, classes[w], w, pre_mask, pre_width))
/seL4-master/src/arch/x86/32/
A Dtraps.S484 # Set EIP in the saved register context to the new IP returned from handleKernelException
/seL4-master/include/arch/x86/arch/64/mode/object/
A Dstructures.bf21 -- The ASID doubles as the PCI bus/dev/fun when used in an IOMMU context
/seL4-master/src/arch/x86/64/
A Dtraps.S579 # Set RIP in the saved register context to the new IP returned from handleKernelException
/seL4-master/LICENSES/
A DCC-BY-SA-4.0.txt217 based on the medium, means, and context in which You Share the Licensed Material.
232 based on the medium, means, and context in which You Share Adapted Material.

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