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/seL4-master/src/plat/pc99/machine/
A Dio.c15 void serial_init(uint16_t port) in serial_init() argument
17 while (!(in8(port + 5) & 0x60)); /* wait until not busy */ in serial_init()
19 out8(port + 1, 0x00); /* disable generating interrupts */ in serial_init()
20 out8(port + 3, 0x80); /* line control register: command: set divisor */ in serial_init()
21 out8(port, 0x01); /* set low byte of divisor to 0x01 = 115200 baud */ in serial_init()
22 out8(port + 1, 0x00); /* set high byte of divisor to 0x00 */ in serial_init()
23 out8(port + 3, 0x03); /* line control register: set 8 bit, no parity, 1 stop bit */ in serial_init()
24 out8(port + 4, 0x0b); /* modem control register: set DTR/RTS/OUT2 */ in serial_init()
26 in8(port); /* clear receiver port */ in serial_init()
27 in8(port + 5); /* clear line status port */ in serial_init()
[all …]
/seL4-master/include/plat/pc99/plat/machine/
A Dio.h14 void out8(uint16_t port, uint8_t value);
16 void out16(uint16_t port, uint16_t value);
18 void out32(uint16_t port, uint32_t value);
20 uint8_t in8(uint16_t port);
22 uint16_t in16(uint16_t port);
24 uint32_t in32(uint16_t port);
27 void serial_init(uint16_t port);
/seL4-master/src/arch/x86/object/
A Dioport.c176 res = in8(port); in invokeX86PortIn()
179 res = in16(port); in invokeX86PortIn()
182 res = in32(port); in invokeX86PortIn()
219 out8(port, data); in invokeX86PortOut()
222 out16(port, data); in invokeX86PortOut()
225 out32(port, data); in invokeX86PortOut()
251 uint16_t port = getSyscallArg(0, buffer) & 0xffff; in decodeX86PortInvocation() local
254 ret = ensurePortOperationAllowed(cap, port, 1); in decodeX86PortInvocation()
267 return invokeX86PortIn(invLabel, port, call); in decodeX86PortInvocation()
276 uint16_t port = getSyscallArg(0, buffer) & 0xffff; in decodeX86PortInvocation() local
[all …]
/seL4-master/tools/dts/
A Dsabre.dts106 port@0 {
115 port@1 {
124 port@2 {
133 port@3 {
142 port@4 {
158 port@0 {
167 port@1 {
176 port@2 {
185 port@3 {
2172 port {
[all …]
A Dwandq.dts106 port@0 {
115 port@1 {
124 port@2 {
133 port@3 {
149 port@0 {
158 port@1 {
167 port@2 {
176 port@3 {
238 port@0 {
247 port@1 {
[all …]
A Dhikey.dts1468 port {
1580 port {
1591 port {
1609 port {
1620 port {
1637 port {
1678 port {
1696 port {
1714 port {
1810 port {
[all …]
A Dapq8064.dts1784 port@0 {
1791 port@1 {
2038 port {
2056 port {
2096 port {
2155 port {
2174 port {
2193 port {
2212 port {
2231 port {
[all …]
A DallwinnerA20.dts344 port@0 {
362 port@1 {
392 port@0 {
410 port@1 {
575 port@0 {
593 port@1 {
1381 port@1 {
1414 port@1 {
1446 port@0 {
1464 port@1 {
[all …]
A Dimx7sabre.dts144 port@0 {
153 port@1 {
165 port {
208 port {
228 port {
247 port {
286 port {
304 port {
315 port {
333 port {
[all …]
A Dfvp.dts465 port {
477 port {
530 port {
542 port {
A Drockpro64.dts494 port {
1696 otg-port {
1724 otg-port {
1769 dp-port {
1793 dp-port {
1908 port {
1972 port {
2080 port {
2117 port@0 {
2155 port@0 {
[all …]
A Dimx8mq-evk.dts533 port {
553 port {
578 port {
610 port {
643 port@0 {
666 port@0 {
721 port@0 {
730 port@1 {
755 port@0 {
1614 port {
[all …]
A Dodroidc2.dts1131 port@0 {
1135 port@1 {
1160 port@0 {
1169 port@1 {
1310 port {
A Dtx2.dts1241 port@0 {
6588 port {
6606 port {
6624 port {
6642 port {
6660 port {
6677 port {
6698 port@0 {
6708 port@1 {
6882 port {
[all …]
A Domap3.dts3511 port {
3521 port {
3545 ssi-port@4805a000 {
3546 compatible = "ti,omap3-ssi-port";
3552 ssi-port@4805b000 {
3721 port@0 {
3730 port@1 {
3747 port {
3760 port {
3777 port {
[all …]
A Dexynos4.dts505 port@0 {
511 port@1 {
517 port@2 {
534 port@0 {
1820 cam-port-a-io {
1827 cam-port-a-clk-active {
1834 cam-port-a-clk-idle {
2215 cam-port-b-io {
2222 cam-port-b-clk-active {
2229 cam-port-b-clk-idle {
A Dimx8mm-evk.dts386 port {
410 port {
1031 port {
1054 port-type = "drp";
1074 port-type = "drp";
1157 port {
1667 port@0 {
1695 port@0 {
1704 port@1 {
A Dexynos5422.dts813 port@0 {
828 port@0 {
3517 cci-control-port = < 0x90 >;
3531 cci-control-port = < 0x90 >;
3544 cci-control-port = < 0x90 >;
3557 cci-control-port = < 0x90 >;
3570 cci-control-port = < 0x93 >;
3584 cci-control-port = < 0x93 >;
3597 cci-control-port = < 0x93 >;
3610 cci-control-port = < 0x93 >;
A Dodroidc4.dts149 clock-names = "general\0pclk\0port";
151 reset-names = "port\0apb";
283 port@0 {
292 port@1 {
2483 port@0 {
2487 port@1 {
3074 port {
A Dexynos5250.dts1441 cam-port-a {
1898 port@0 {
1913 port@0 {
2112 port@1 {
2640 port {
/seL4-master/manual/parts/api/
A Ddebug_putchar.tex16 {Prints a character to the serial port, if debugging is turned on.}
/seL4-master/src/arch/x86/64/
A Dmachine_asm.S21 BEGIN_FUNC(out8) # port, value
/seL4-master/manual/parts/
A Dbootup.tex48 \texttt{seL4\_CapIOPort} & global I/O port cap, null cap if unsupported
232 I/O-port base of the serial port that the kernel prints to
236 I/O-port base of the serial port that is used for kernel debugging
A Dio.tex88 and an unsigned integer~\texttt{port}, which indicates the I/O port to read from
90 In each case, \texttt{port} must be within the range of I/O ports identified
93 The I/O port methods return error codes upon failure.
94 A \texttt{seL4\_IllegalOperation} code is returned if port access is
A Dthreads.tex685 …\_EnableIOPort}{x86_vcpu_enableioport} invocation and allows the provided I/O port capability to be
686 linked to the VCPU, and a subset of its I/O port range to be made accessible to the \obj{VCPU}.
687 Linking means that an I/O port capability can only be used in a single \apifunc{seL4\_X86\_VCPU\_En…
689 if the I/O port capability is deleted for any reason the access will be correspondingly removed

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