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/seL4-master/tools/hardware/
A Dmemory.py17 self.size = size
22 return Region(other.base, other.size)
33 self.base + self.size - (1 if self.size > 0 else 0),
34 self.size)
37 return self.base == other.base and self.size == other.size
76 if (excluded.base + excluded.size) < (self.base + self.size):
82 if (self.base + self.size) > (excluded.base + excluded.size):
91 if self.size < diff:
109 size = self.size
111 while size > 0:
[all …]
/seL4-master/tools/dts/
A Dmpfs_icicle.dts7 #size-cells = <2>;
12 #size-cells = <0>;
40 d-tlb-size = <32>;
46 i-tlb-size = <32>;
67 d-tlb-size = <32>;
73 i-tlb-size = <32>;
94 d-tlb-size = <32>;
100 i-tlb-size = <32>;
121 d-tlb-size = <32>;
127 i-tlb-size = <32>;
[all …]
A Dhifive.dts9 #size-cells = <0x00000002>;
24 #size-cells = <0x00000000>;
32 i-cache-size = <0x00004000>;
52 d-cache-size = <0x00008000>;
54 d-tlb-size = <0x00000020>;
60 i-tlb-size = <0x00000020>;
83 d-tlb-size = <0x00000020>;
89 i-tlb-size = <0x00000020>;
112 d-tlb-size = <0x00000020>;
118 i-tlb-size = <0x00000020>;
[all …]
A Drocketchip.dts34 #size-cells = <1>;
41 #size-cells = <0>;
45 d-cache-block-size = <64>;
47 d-cache-size = <16384>;
49 d-tlb-size = <32>;
51 i-cache-block-size = <64>;
53 i-cache-size = <16384>;
55 i-tlb-size = <32>;
76 #size-cells = <1>;
A Dzynqmp.dts16 #size-cells = < 0x02 >;
21 #size-cells = < 0x00 >;
129 #size-cells = < 0x01 >;
146 #size-cells = < 0x02 >;
178 #size-cells = < 0x01 >;
372 #size-cells = < 0x00 >;
384 #size-cells = < 0x00 >;
396 #size-cells = < 0x00 >;
408 #size-cells = < 0x00 >;
442 #size-cells = < 0x00 >;
[all …]
A DallwinnerA20.dts15 #size-cells = < 0x01 >;
22 #size-cells = < 0x01 >;
60 #size-cells = < 0x00 >;
120 #size-cells = < 0x01 >;
125 size = < 0x6000000 >;
144 #size-cells = < 0x01 >;
198 #size-cells = < 0x01 >;
205 #size-cells = < 0x01 >;
281 #size-cells = < 0x00 >;
294 #size-cells = < 0x00 >;
[all …]
A Dzynq7000.dts15 #size-cells = < 0x01 >;
21 #size-cells = < 0x00 >;
45 #size-cells = < 0x01 >;
69 #size-cells = < 0x01 >;
127 #size-cells = < 0x00 >;
135 #size-cells = < 0x00 >;
225 #size-cells = < 0x00 >;
280 #size-cells = < 0x00 >;
292 #size-cells = < 0x00 >;
303 #size-cells = < 0x00 >;
[all …]
A Dspike.dts15 #size-cells = <0x00000002>;
23 #size-cells = <0x00000000>;
48 #size-cells = <0x00000002>;
A Dultra96.dts16 #size-cells = < 0x02 >;
21 #size-cells = < 0x00 >;
129 #size-cells = < 0x01 >;
146 #size-cells = < 0x02 >;
178 #size-cells = < 0x01 >;
372 #size-cells = < 0x00 >;
384 #size-cells = < 0x00 >;
396 #size-cells = < 0x00 >;
408 #size-cells = < 0x00 >;
433 #size-cells = < 0x00 >;
[all …]
A Drpi4.dts18 #size-cells = <0x01>;
35 #size-cells = <0x01>;
40 size = <0x4000000>;
72 #size-cells = <0x01>;
866 #size-cells = <0x00>;
876 #size-cells = <0x00>;
889 #size-cells = <0x00>;
898 #size-cells = <0x00>;
1400 #size-cells = <0x01>;
1430 #size-cells = <0x00>;
[all …]
/seL4-master/src/
A Dstring.c18 word_t strlcpy(char *dest, const char *src, word_t size) in strlcpy() argument
21 for (len = 0; len + 1 < size && src[len]; len++) { in strlcpy()
28 word_t strlcat(char *dest, const char *src, word_t size) in strlcat() argument
32 for (len = 0; len < size && dest[len]; len++); in strlcat()
35 if (len < size) { in strlcat()
36 for (; len + 1 < size && *src; len++, src++) { in strlcat()
/seL4-master/tools/hardware/utils/
A Dmemory.py37 if dnreg['region'].base == dreg['region'].base + dreg['region'].size:
40 elif dreg['region'].base == dnreg['region'].base + dnreg['region'].size:
48 size = reg['region'].size
51 size += r_adj['region'].size
53 contiguous_regions.add(Region(reg['region'].base, size, reg['region'].owner))
A Drule.py48 region.size = min(max_size, region.size)
50 self.size = aligned.size
79 return offset + self.size
101 return other.base == self.base and other.size == self.size
174 elif max_size < reg.size:
176 … node {}, region {}. Set kernel_size in YAML to silence.".format(max_size, reg.size, node.path, i))
/seL4-master/src/arch/x86/machine/
A Dbreakpoint.c203 size = 0; in convertSizeToArch()
205 switch (size) { in convertSizeToArch()
207 size = X86_DEBUG_BP_SIZE_1B; in convertSizeToArch()
210 size = X86_DEBUG_BP_SIZE_2B; in convertSizeToArch()
213 size = X86_DEBUG_BP_SIZE_8B; in convertSizeToArch()
216 assert(size == 4); in convertSizeToArch()
217 size = X86_DEBUG_BP_SIZE_4B; in convertSizeToArch()
223 return size << X86_DEBUG_BP0_SIZE_SHIFT; in convertSizeToArch()
225 return size << X86_DEBUG_BP1_SIZE_SHIFT; in convertSizeToArch()
227 return size << X86_DEBUG_BP2_SIZE_SHIFT; in convertSizeToArch()
[all …]
/seL4-master/libsel4/tools/
A Dbitfield_gen.py1240 return "(mask %d << %d)" % (size, base_bits - size)
1242 return "mask %d" % size
1686 if size < self.base:
1863 if size < self.base:
1865 mask = ((1 << size) - 1) << (self.base_bits - size)
2101 used.add(size)
2176 self.size = sum(size for _name, size, _high in fields)
2177 offset = self.size
2216 if self.size % base != 0:
2479 if size < self.base:
[all …]
/seL4-master/tools/
A Dbitfield_gen.py1240 return "(mask %d << %d)" % (size, base_bits - size)
1242 return "mask %d" % size
1686 if size < self.base:
1863 if size < self.base:
1865 mask = ((1 << size) - 1) << (self.base_bits - size)
2101 used.add(size)
2176 self.size = sum(size for _name, size, _high in fields)
2177 offset = self.size
2216 if self.size % base != 0:
2479 if size < self.base:
[all …]
/seL4-master/include/machine/
A Dio.h29 int impl_ksnvprintf(char *str, word_t size, const char *format, va_list ap);
97 word_t size, in snprintf() argument
103 int ret = impl_ksnvprintf(buf, size, format, args); in snprintf()
A Dassembler.h23 .size _name, .-_name
34 .size _name, .-_name
A Ddebug.h35 word_t vaddr, word_t type, word_t size, word_t rw);
53 word_t vaddr, type, size, rw; member
/seL4-master/libsel4/include/sel4/
A Dmacros.h56 #define SEL4_SIZE_SANITY(index, entry, size) \ argument
57 SEL4_COMPILE_ASSERT(index##_##entry##_##size, (index) + (entry) == size)
A Dconstants.h91 static inline seL4_Word seL4_MaxExtraRefills(seL4_Word size) in seL4_MaxExtraRefills() argument
93 return (LIBSEL4_BIT(size) - seL4_CoreSchedContextBytes) / seL4_RefillSizeBytes; in seL4_MaxExtraRefills()
/seL4-master/include/
A Dstring.h12 word_t strlcpy(char *dest, const char *src, word_t size);
13 word_t strlcat(char *dest, const char *src, word_t size);
/seL4-master/include/object/
A Dstructures_32.bf7 -- Default base size: uint32_t
147 -- Endpoint: size = 16 bytes
159 -- Notification object: size = 16 bytes (32 bytes on mcs)
181 -- Mapping database (MDB) node: size = 8 bytes
240 -- Lookup fault: size = 8 bytes
274 -- Fault: size = 8 bytes
322 -- Thread state: size = 12 bytes
/seL4-master/src/arch/arm/armv/armv8-a/64/
A Dcache.c39 word_t size, csselr_old; in readCacheSize() local
45 MRS("ccsidr_el1", size); in readCacheSize()
48 return size; in readCacheSize()
/seL4-master/include/arch/x86/arch/kernel/
A Dmultiboot2.h20 uint32_t size; member
25 uint64_t size; member

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