| /seL4-master/src/drivers/timer/ |
| A D | omap3430-timer.c | 25 timer_t *timer = (timer_t *) TIMER_PPTR; variable
34 timer->cfg = TIOCP_CFG_SOFTRESET; in initTimer()
37 timer->tclr = 0; in initTimer()
40 while (!timer->tistat); in initTimer()
45 timer->tldr = 0u; in initTimer()
51 timer->tcrr = 0u; in initTimer()
61 timer->cfg = TIOCP_CFG_SOFTRESET; in initTimer()
63 while (!timer->tistat); in initTimer()
68 timer->tldr = 0xFFFFFFFFUL - TIMER_RELOAD; in initTimer()
71 timer->tier = TIER_OVERFLOWENABLE; in initTimer()
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| A D | config.cmake | 11 PREFIX src/drivers/timer
12 CFILES "am335x-timer.c"
16 PREFIX src/drivers/timer
17 CFILES "kpss-timer.c"
21 PREFIX src/drivers/timer
26 PREFIX src/drivers/timer
31 PREFIX src/drivers/timer
36 PREFIX src/drivers/timer
57 foreach(match_string IN ITEMS "arm,armv7-timer" "arm,armv8-timer")
86 Grant user access to physical timer registers of the generic timer. \
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| A D | am335x-timer.c | 29 timer_t *timer = (timer_t *) TIMER_PPTR; variable
102 SET_REGISTER(timer->cfg, TIOCP_CFG_SOFTRESET); in initTimer()
105 SET_REGISTER(timer->tclr, 0u); in initTimer()
118 SET_REGISTER(timer->tldr, 0u); in initTimer()
121 SET_REGISTER(timer->tier, (TIER_OVERFLOW_ENABLE | TIER_MATCH_ENABLE)); in initTimer()
124 SET_REGISTER(timer->tcrr, 0u); in initTimer()
141 timer->cfg = TIOCP_CFG_SOFTRESET; in initTimer()
153 timer->tldr = 0xFFFFFFFFUL - TIMER_RELOAD; in initTimer()
156 timer->tier = TIER_OVERFLOW_ENABLE; in initTimer()
159 timer->tcrr = 0xFFFFFFFFUL - TIMER_RELOAD; in initTimer()
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| A D | kpss-timer.c | 13 struct timer { struct
20 typedef volatile struct timer timer_t; argument
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| /seL4-master/include/drivers/timer/ |
| A D | am335x.h | 14 struct timer { struct
36 typedef volatile struct timer timer_t; argument
37 extern timer_t *timer;
46 bool_t overflow = !!(timer->tisr & TISR_OVF_FLAG); in getCurrentTime()
62 timer->tmar = (uint32_t)deadline; in setDeadline()
69 if (timer->tisr & TISR_OVF_FLAG) { in ackDeadlineIRQ()
71 timer->tisr = TISR_OVF_FLAG; in ackDeadlineIRQ()
72 assert((timer->tisr & TISR_OVF_FLAG) == 0); in ackDeadlineIRQ()
75 if (timer->tisr & TISR_MATCH_FLAG) { in ackDeadlineIRQ()
77 timer->tmar = 0xffffffff; in ackDeadlineIRQ()
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| A D | omap3430.h | 14 struct timer { struct
37 typedef volatile struct timer timer_t; argument
38 extern timer_t *timer;
47 timer->tmar = (uint32_t) deadline; in setDeadline()
53 bool_t overflow = !!(timer->tisr & TISR_OVF_FLAG); in getCurrentTime()
54 return (((uint64_t) high_bits + overflow) << 32llu) + timer->tcrr; in getCurrentTime()
61 if (timer->tisr & TISR_OVF_FLAG) { in ackDeadlineIRQ()
66 timer->tisr = TISR_OVF_FLAG | TISR_MATCH_FLAG; in ackDeadlineIRQ()
67 assert((timer->tisr & TISR_OVF_FLAG) == 0); in ackDeadlineIRQ()
72 timer->tisr = TISR_OVF_FLAG; in resetTimer()
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| A D | arm_priv.h | 12 struct timer { struct
18 typedef volatile struct timer timer_t; argument
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| A D | arm_global.h | 22 struct timer { struct
31 typedef volatile struct timer timer_t; argument
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| /seL4-master/tools/ |
| A D | hardware.yml | 81 # Exynos multi core timer (timer/samsung,exynos4210-mct.txt)
121 # ARM architected timer (timer/arm,arch_timer.txt)
123 - arm,armv7-timer
124 - arm,armv8-timer
131 # ARM per-core timer-watchdog (timer/arm,twd.txt)
139 # Cortex-a9 global timer (timer/arm,global_timer.yaml)
148 # QCOM Krait timer (timer/qcom,msm-timer.txt)
150 - qcom,kpss-timer
156 # TI AM335x/OMAP3430 timer
158 - ti,am335x-timer
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| /seL4-master/src/plat/am335x/ |
| A D | overlay-am335x.dts | 14 /* The following devices are used to support the timer used by the kernel */
15 /* dmtimer4, OMAP Dual-Mode timer */
16 &{/ocp/timer@48044000},
18 &{/ocp/wdt@44e35000}; /* Watchdog timer */
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| A D | config.cmake | 47 TIMER drivers/timer/am335x.h
51 # Currently Kernel timer is DMTIMER4 using CLK_M_OSC.
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| /seL4-master/src/plat/imx6/ |
| A D | mcs-overlay-imx6.dts | 10 timer@a00200 {
11 compatible = "arm,cortex-a9-global-timer";
24 &{/soc/timer@a00200};
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| A D | mcs-overlay-nitrogen6sx.dts | 10 timer@a00200 {
11 compatible = "arm,cortex-a9-global-timer";
24 &{/soc/timer@a00200};
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| A D | config.cmake | 62 set(timer_file drivers/timer/arm_global.h)
64 set(timer_file drivers/timer/arm_priv.h)
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| /seL4-master/src/plat/exynos5/ |
| A D | overlay-exynos5410.dts | 17 &{/timer};
19 /* The architecture timer on exynos5 depends on the MCT, but it is there. */
20 timer {
21 compatible = "arm,armv7-timer";
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| A D | overlay-exynos5422.dts | 23 &{/timer};
26 /* The architecture timer on exynos5 depends on the MCT, but it is there. */
27 timer {
28 compatible = "arm,armv7-timer";
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| /seL4-master/src/plat/qemu-arm-virt/ |
| A D | overlay-qemu-arm-virt.dts | 15 &{/timer}; /* Watchdog timer */
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| /seL4-master/src/plat/zynq7000/ |
| A D | config.cmake | 20 set(timer_file drivers/timer/arm_global.h)
23 set(timer_file drivers/timer/arm_priv.h)
26 # This is the timer frequency that can pass tests (in particular
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| /seL4-master/src/arch/riscv/ |
| A D | platform_gen.h.in | 17 * invocations. On RISC-V we have 3 different types of interrupts: core timer,
23 * the kernel timer interrupts after the last PLIC interrupt and intend on
25 * timer and SGI interrupts are never seen outside of the kernel, it doesn't
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| /seL4-master/src/plat/allwinnerA20/ |
| A D | config.cmake | 17 # MCS is not supported on allwinnerA20. It requires a timer driver that
28 TIMER drivers/timer/arm_generic.h
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| /seL4-master/src/plat/apq8064/ |
| A D | config.cmake | 14 # MCS is not supported on apq8064. It requires a timer driver that
29 TIMER drivers/timer/arm_generic.h
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| /seL4-master/tools/dts/ |
| A D | fvp.dts | 89 local-timer-stop;
99 local-timer-stop;
198 timer {
199 compatible = "arm,armv8-timer";
424 timer@1c110000 {
432 timer@1c120000 {
499 timer@2a810000 {
500 compatible = "arm,armv7-timer-mem";
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| /seL4-master/src/plat/rockpro64/ |
| A D | overlay-rockpro64.dts | 15 &{/timer};
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| /seL4-master/src/plat/fvp/ |
| A D | overlay-fvp.dts | 16 &{/timer};
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| /seL4-master/src/plat/odroidc4/ |
| A D | overlay-odroidc4.dts | 16 &{/timer};
|