Searched refs:CTR_BPU_0 (Results 1 – 1 of 1) sorted by relevance
| /xen-4.10.0-shim-comet/xen/arch/x86/oprofile/ |
| A D | op_model_p4.c | 73 #define CTR_BPU_0 (1 << 0) macro
83 { CTR_BPU_0, MSR_P4_BPU_PERFCTR0, MSR_P4_BPU_CCCR0 },
128 { { CTR_BPU_0, MSR_P4_BPU_ESCR0},
134 { { CTR_BPU_0, MSR_P4_ITLB_ESCR0},
164 { { CTR_BPU_0, MSR_P4_MOB_ESCR0},
170 { { CTR_BPU_0, MSR_P4_PMH_ESCR0},
176 { { CTR_BPU_0, MSR_P4_BSU_ESCR0},
182 { { CTR_BPU_0, MSR_P4_FSB_ESCR0},
194 { { CTR_BPU_0, MSR_P4_FSB_ESCR0},
200 { { CTR_BPU_0, MSR_P4_BSU_ESCR0},
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