Searched refs:GICD_SETSPI_SR (Results 1 – 2 of 2) sorted by relevance
29 #define GICD_SETSPI_SR (0x050) macro
1177 case VREG32(GICD_SETSPI_SR): in vgic_v3_distr_mmio_read()1365 case VREG32(GICD_SETSPI_SR): in vgic_v3_distr_mmio_write()
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