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Searched refs:GICR_CTLR (Results 1 – 4 of 4) sorted by relevance

/xen-4.10.0-shim-comet/xen/include/asm-arm/
A Dgic_v3_defs.h71 #define GICR_CTLR (0x0000) macro
/xen-4.10.0-shim-comet/xen/arch/arm/
A Dgic-v3-lpi.c349 reg = readl_relaxed(rdist_base + GICR_CTLR); in gicv3_lpi_init_rdist()
A Dgic-v3.c648 val = readl_relaxed(GICD_RDIST_BASE + GICR_CTLR); in gicv3_enable_lpis()
649 writel_relaxed(val | GICR_CTLR_ENABLE_LPIS, GICD_RDIST_BASE + GICR_CTLR); in gicv3_enable_lpis()
A Dvgic-v3.c174 case VREG32(GICR_CTLR): in __vgic_v3_rdistr_rd_mmio_read()
489 case VREG32(GICR_CTLR): in __vgic_v3_rdistr_rd_mmio_write()

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