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Searched refs:ICH_LR1_EL2 (Results 1 – 2 of 2) sorted by relevance

/xen-4.10.0-shim-comet/xen/include/asm-arm/arm64/
A Dsysregs.h141 #define ICH_LR1_EL2 __LR0_EL2(1) macro
/xen-4.10.0-shim-comet/xen/arch/arm/
A Dgic-v3.c106 v->arch.gic.v3.lr[1] = READ_SYSREG(ICH_LR1_EL2); in gicv3_save_lrs()
153 WRITE_SYSREG(v->arch.gic.v3.lr[1], ICH_LR1_EL2); in gicv3_restore_lrs()
167 case 1: return READ_SYSREG(ICH_LR1_EL2); in gicv3_ich_read_lr()
195 WRITE_SYSREG(val, ICH_LR1_EL2); in gicv3_ich_write_lr()

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