Searched refs:LVL_1_INST (Results 1 – 1 of 1) sorted by relevance
| /xen-4.10.0-shim-comet/xen/arch/x86/cpu/ |
| A D | intel_cacheinfo.c | 15 #define LVL_1_INST 1 macro
31 { 0x06, LVL_1_INST, 8 }, /* 4-way set assoc, 32 byte line size */
32 { 0x08, LVL_1_INST, 16 }, /* 4-way set assoc, 32 byte line size */
40 { 0x30, LVL_1_INST, 32 }, /* 8-way set assoc, 64 byte line size */
212 case LVL_1_INST: in init_intel_cacheinfo()
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