Searched refs:LVL_2 (Results 1 – 1 of 1) sorted by relevance
| /xen-4.10.0-shim-comet/xen/arch/x86/cpu/ |
| A D | intel_cacheinfo.c | 17 #define LVL_2 3 macro
47 { 0x41, LVL_2, 128 }, /* 4-way set assoc, 32 byte line size */
48 { 0x42, LVL_2, 256 }, /* 4-way set assoc, 32 byte line size */
49 { 0x43, LVL_2, 512 }, /* 4-way set assoc, 32 byte line size */
67 { 0x78, LVL_2, 1024 }, /* 4-way set assoc, 64 byte line size */
72 { 0x7d, LVL_2, 2048 }, /* 8-way set assoc, 64 byte line size */
73 { 0x7f, LVL_2, 512 }, /* 2-way set assoc, 64 byte line size */
74 { 0x82, LVL_2, 256 }, /* 8-way set assoc, 32 byte line size */
75 { 0x83, LVL_2, 512 }, /* 8-way set assoc, 32 byte line size */
76 { 0x84, LVL_2, 1024 }, /* 8-way set assoc, 32 byte line size */
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