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Searched refs:MSR_AMD64_DR0_ADDRESS_MASK (Results 1 – 5 of 5) sorted by relevance

/xen-4.10.0-shim-comet/xen/arch/x86/hvm/svm/
A Dsvm.c179 svm_intercept_msr(v, MSR_AMD64_DR0_ADDRESS_MASK, MSR_INTERCEPT_RW); in svm_save_dr()
184 rdmsrl(MSR_AMD64_DR0_ADDRESS_MASK, v->arch.hvm_svm.dr_mask[0]); in svm_save_dr()
210 svm_intercept_msr(v, MSR_AMD64_DR0_ADDRESS_MASK, MSR_INTERCEPT_NONE); in __restore_debug_registers()
215 wrmsrl(MSR_AMD64_DR0_ADDRESS_MASK, v->arch.hvm_svm.dr_mask[0]); in __restore_debug_registers()
408 ctxt->msr[ctxt->count++].index = MSR_AMD64_DR0_ADDRESS_MASK; in svm_save_msr()
433 case MSR_AMD64_DR0_ADDRESS_MASK: in svm_load_msr()
1912 case MSR_AMD64_DR0_ADDRESS_MASK: in svm_msr_read_intercept()
2068 case MSR_AMD64_DR0_ADDRESS_MASK: in svm_msr_write_intercept()
/xen-4.10.0-shim-comet/xen/include/asm-x86/
A Dmsr-index.h211 #define MSR_AMD64_DR0_ADDRESS_MASK 0xc0011027 macro
/xen-4.10.0-shim-comet/xen/arch/x86/pv/
A Demul-priv-op.c936 case MSR_AMD64_DR0_ADDRESS_MASK: in read_msr()
1134 case MSR_AMD64_DR0_ADDRESS_MASK: in write_msr()
1139 wrmsrl(MSR_AMD64_DR0_ADDRESS_MASK, val); in write_msr()
/xen-4.10.0-shim-comet/xen/arch/x86/
A Ddomctl.c1366 msr.index = MSR_AMD64_DR0_ADDRESS_MASK; in arch_do_domctl()
1423 case MSR_AMD64_DR0_ADDRESS_MASK: in arch_do_domctl()
A Dtraps.c1970 wrmsrl(MSR_AMD64_DR0_ADDRESS_MASK, curr->arch.pv_vcpu.dr_mask[0]); in activate_debugregs()

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