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Searched refs:MSR_IA32_MC0_STATUS (Results 1 – 5 of 5) sorted by relevance

/xen-4.10.0-shim-comet/xen/include/asm-x86/
A Dmsr-index.h106 #define MSR_IA32_MC0_STATUS 0x00000401 macro
116 #define MSR_IA32_MCx_STATUS(x) (MSR_IA32_MC0_STATUS + 4*(x))
/xen-4.10.0-shim-comet/xen/arch/x86/cpu/mcheck/
A Dvmce.c119 case MSR_IA32_MC0_STATUS: in bank_mce_rdmsr()
252 case MSR_IA32_MC0_STATUS: in bank_mce_wrmsr()
A Dmce_intel.c847 wrmsrl(MSR_IA32_MC0_STATUS, 0x0ULL); in intel_init_mce()
/xen-4.10.0-shim-comet/tools/tests/mce-test/tools/
A Dxen-mceinj.c54 #define MSR_IA32_MC0_STATUS 0x00000401 macro
/xen-4.10.0-shim-comet/xen/arch/x86/hvm/svm/
A Dsvm.c2312 rdmsrl(MSR_IA32_MC0_STATUS, msr_content); in svm_is_erratum_383()

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