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Searched refs:MSR_IA32_MCx_STATUS (Results 1 – 5 of 5) sorted by relevance

/xen-4.10.0-shim-comet/xen/arch/x86/cpu/mcheck/
A Dmce_amd.c195 wrmsrl(MSR_IA32_MCx_STATUS(4), 0ULL); in mcequirk_amd_apply()
293 wrmsrl(MSR_IA32_MCx_STATUS(i), 0x0ULL); in amd_mcheck_init()
A Dmce.c158 status = mca_rdmsr(MSR_IA32_MCx_STATUS(banknum)); in mcabank_clear()
165 mca_wrmsr(MSR_IA32_MCx_STATUS(banknum), 0x0ULL); in mcabank_clear()
208 mib->mc_status = mca_rdmsr(MSR_IA32_MCx_STATUS(bank)); in mca_init_bank()
329 status = mca_rdmsr(MSR_IA32_MCx_STATUS(i)); in mcheck_mca_logout()
A Dmce_intel.c843 wrmsrl(MSR_IA32_MCx_STATUS(i), 0x0ULL); in intel_init_mce()
/xen-4.10.0-shim-comet/xen/include/asm-x86/
A Dmsr-index.h116 #define MSR_IA32_MCx_STATUS(x) (MSR_IA32_MC0_STATUS + 4*(x)) macro
/xen-4.10.0-shim-comet/xen/arch/x86/hvm/svm/
A Dsvm.c2321 wrmsrl(MSR_IA32_MCx_STATUS(i), 0ULL); in svm_is_erratum_383()

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