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Searched refs:MSR_IA32_MISC_ENABLE_BTS_UNAVAIL (Results 1 – 4 of 4) sorted by relevance

/xen-4.10.0-shim-comet/xen/include/asm-x86/
A Dmsr-index.h331 #define MSR_IA32_MISC_ENABLE_BTS_UNAVAIL (1<<11) macro
/xen-4.10.0-shim-comet/xen/arch/x86/cpu/
A Dvpmu_intel.c750 *msr_content &= ~MSR_IA32_MISC_ENABLE_BTS_UNAVAIL; in core2_vpmu_do_rdmsr()
884 if ( msr_content & MSR_IA32_MISC_ENABLE_BTS_UNAVAIL ) in vmx_vpmu_initialise()
/xen-4.10.0-shim-comet/xen/arch/x86/pv/
A Demul-priv-op.c825 val |= MSR_IA32_MISC_ENABLE_BTS_UNAVAIL | in guest_misc_enable()
/xen-4.10.0-shim-comet/xen/arch/x86/hvm/vmx/
A Dvmx.c2918 *msr_content |= MSR_IA32_MISC_ENABLE_BTS_UNAVAIL | in vmx_msr_read_intercept()

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