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Searched refs:MSR_IA32_PEBS_ENABLE (Results 1 – 3 of 3) sorted by relevance

/xen-4.10.0-shim-comet/xen/include/asm-x86/
A Dmsr-index.h56 #define MSR_IA32_PEBS_ENABLE 0x000003f1 macro
/xen-4.10.0-shim-comet/xen/arch/x86/cpu/
A Dvpmu_intel.c188 case MSR_IA32_PEBS_ENABLE: in is_core2_vpmu_msr()
580 case MSR_IA32_PEBS_ENABLE: in core2_vpmu_do_wrmsr()
/xen-4.10.0-shim-comet/xen/arch/x86/hvm/vmx/
A Dvmx.c2926 case MSR_IA32_PEBS_ENABLE: in vmx_msr_read_intercept()
3146 case MSR_IA32_PEBS_ENABLE: in vmx_msr_write_intercept()

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