Searched refs:MSR_P4_BPU_ESCR0 (Results 1 – 2 of 2) sorted by relevance

/xen-4.10.0-shim-comet/xen/include/asm-x86/
A D	msr-index.h	416 #define MSR_P4_BPU_ESCR0 0x000003b2 macro
/xen-4.10.0-shim-comet/xen/arch/x86/oprofile/
A D	op_model_p4.c	128 { { CTR_BPU_0, MSR_P4_BPU_ESCR0},

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