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Searched refs:MSR_P4_TBPU_ESCR1 (Results 1 – 2 of 2) sorted by relevance

/xen-4.10.0-shim-comet/xen/arch/x86/oprofile/
A Dop_model_p4.c333 { CTR_MS_2, MSR_P4_TBPU_ESCR1} }
339 { CTR_MS_2, MSR_P4_TBPU_ESCR1} }
/xen-4.10.0-shim-comet/xen/include/asm-x86/
A Dmsr-index.h456 #define MSR_P4_TBPU_ESCR1 0x000003c3 macro

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