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/xen-4.10.0-shim-comet/xen/include/asm-arm/arm32/
A Dprocessor.h112 #define READ_SYSREG32(R...) READ_CP32(R) argument
113 #define WRITE_SYSREG32(V, R...) WRITE_CP32(V, R) argument
115 #define READ_SYSREG64(R...) READ_CP64(R) argument
116 #define WRITE_SYSREG64(V, R...) WRITE_CP64(V, R) argument
118 #define READ_SYSREG(R...) READ_SYSREG32(R) argument
119 #define WRITE_SYSREG(V, R...) WRITE_SYSREG32(V, R) argument
A Dpage.h23 #define __invalidate_dcache_one(R) STORE_CP32(R, DCIMVAC) argument
26 #define __clean_dcache_one(R) STORE_CP32(R, DCCMVAC) argument
30 #define __clean_and_invalidate_dcache_one(R) STORE_CP32(R, DCCIMVAC) argument
/xen-4.10.0-shim-comet/xen/include/asm-arm/arm64/
A Dpage.h20 #define __invalidate_dcache_one(R) "dc ivac, %" #R ";" argument
23 #define __clean_dcache_one(R) \ argument
24 ALTERNATIVE("dc cvac, %" #R ";", \
25 "dc civac, %" #R ";", \
30 #define __clean_and_invalidate_dcache_one(R) "dc civac, %" #R ";" argument
/xen-4.10.0-shim-comet/tools/tests/mem-sharing/
A Dmemshrtool.c37 #define R(f) do { \ macro
83 R(xc_memshr_control(xch, domid, 1)); in main()
93 R(xc_memshr_control(xch, domid, 0)); in main()
106 R(xc_memshr_nominate_gfn(xch, domid, gfn, &handle)); in main()
127 R(xc_memshr_share_gfns(xch, source_domid, source_gfn, source_handle, domid, gfn, handle)); in main()
143 R((int)!map); in main()
161 R(xc_memshr_add_to_physmap(xch, source_domid, source_gfn, source_handle, domid, gfn)); in main()
173 R(xc_memshr_debug_gfn(xch, domid, gfn)); in main()
/xen-4.10.0-shim-comet/tools/firmware/vgabios/
A Dvbe_display_api.txt131 * VBE_DISPI_INDEX_ID : WORD {R,W}
141 * VBE_DISPI_INDEX_XRES : WORD {R,W}
149 * VBE_DISPI_INDEX_YRES : WORD {R,W}
157 * VBE_DISPI_INDEX_BPP : WORD {R,W}
165 * VBE_DISPI_INDEX_ENABLE : WORD {R,W}
173 * VBE_DISPI_INDEX_BANK : WORD {R,W}
188 * VBE_DISPI_INDEX_X_OFFSET : WORD {R,W}
192 * VBE_DISPI_INDEX_Y_OFFSET : WORD {R,W}
198 * VBE_DISPI_INDEX_BPP : WORD {R,W}
202 * VBE_DISPI_INDEX_ENABLE : WORD {R,W}
[all …]
/xen-4.10.0-shim-comet/tools/tests/x86_emulator/
A Dblowfish.c434 uint32_t L = input >> 32, R = input; in blowfish_test() local
437 Blowfish_Encrypt(&ctx, &L, &R); in blowfish_test()
438 Blowfish_Decrypt(&ctx, &L, &R); in blowfish_test()
439 return ((uint64_t)L << 32) | R; in blowfish_test()
/xen-4.10.0-shim-comet/xen/drivers/char/
A DKconfig20 This selects the ARM(R) AMBA(R) PrimeCell PL011 UART. If you have
45 or Renesas R-Car Gen 2/3 based board say Y.
/xen-4.10.0-shim-comet/unmodified_drivers/linux-2.6/
A Dmkbuildtree12 R=${C%/*/*}
17 XEN=$R/xen
24 XL=$R/linux-2.6.18-xen.hg
/xen-4.10.0-shim-comet/tools/ocaml/xenstored/
A Dsystemd.ml2 * Copyright (C) 2014 Luis R. Rodriguez <mcgrof@suse.com>
A Dsystemd.mli2 * Copyright (C) 2014 Luis R. Rodriguez <mcgrof@suse.com>
/xen-4.10.0-shim-comet/
A DREADME183 Intel(R) Trusted Execution Technology Support
186 Intel's technology for safer computing, Intel(R) Trusted Execution Technology
187 (Intel(R) TXT), defines platform-level enhancements that provide the building
191 Intel(R) TXT support is provided by the Trusted Boot (tboot) module in
194 Tboot is an open source, pre- kernel/VMM module that uses Intel(R) TXT to
A DCODING_STYLE64 unlike K&R. do/while loops are an exception. e.g.:
A Dconfig.guess1185 R[34]000:*System_V*:*:* | R4000:UNIX_SYSV:*:* | R*000:UNIX_SV:*:*)
1219 SX-8R:SUPER-UX:*:*)
A DMAINTAINERS222 INTEL(R) TRUSTED EXECUTION TECHNOLOGY (TXT)
229 INTEL(R) VT FOR DIRECTED I/O (VT-D)
234 INTEL(R) VT FOR X86 (VT-X)
/xen-4.10.0-shim-comet/docs/misc/arm/
A Dearly-printk.txt42 - lager: printk with SCIF0 on Renesas R-Car H2 processors
45 - rcar3: printk with SCIF2 on Renesas R-Car Gen3 processors
/xen-4.10.0-shim-comet/m4/
A DREADME.source40 systemd.m4 was contributed to by Luis R. Rodriguez <mcgrof@do-not-panic.com>,
A Dsystemd.m43 # Copyright (C) 2014 Luis R. Rodriguez <mcgrof@suse.com>
/xen-4.10.0-shim-comet/docs/man/
A Dxentop.pod.180 =item B<R>
/xen-4.10.0-shim-comet/xen/tools/
A Dxen.flf1888 0x0154 LATIN CAPITAL LETTER R WITH ACUTE
1895 0x0155 LATIN SMALL LETTER R WITH ACUTE
1902 0x0156 LATIN CAPITAL LETTER R WITH CEDILLA
1909 0x0157 LATIN SMALL LETTER R WITH CEDILLA
1916 0x0158 LATIN CAPITAL LETTER R WITH CARON
1923 0x0159 LATIN SMALL LETTER R WITH CARON
/xen-4.10.0-shim-comet/xen/arch/x86/
A DKconfig115 Allows support for Trusted Boot using the Intel(R) Trusted Execution
/xen-4.10.0-shim-comet/tools/xentrace/
A Dxenalyze.c1974 int I, J, L, R, K; in percentile() local
1986 L=0; R=N-1; in percentile()
1988 while(L < R) { in percentile()
1994 J=R; in percentile()
2020 R=J; in percentile()
2052 R=N-1; in weighted_percentile()
2056 while(L < R) { in weighted_percentile()
2104 R=J; in weighted_percentile()
2139 R=N-1; in self_weighted_percentile()
2143 while(L < R) { in self_weighted_percentile()
[all …]
/xen-4.10.0-shim-comet/xen/tools/kconfig/
A Dzconf.hash.c_shipped16 && ('R' == 82) && ('S' == 83) && ('T' == 84) && ('U' == 85) \
/xen-4.10.0-shim-comet/xen/arch/arm/
A Dtraps.c245 #define REGOFFS(R) offsetof(struct cpu_user_regs, R) in select_user_reg() argument
/xen-4.10.0-shim-comet/stubdom/grub.patches/
A D61btrfs.diff1475 + c-indentation-style: "K&R"
3372 + c-indentation-style: "K&R"
/xen-4.10.0-shim-comet/xen/arch/x86/x86_emulate/
A Dx86_emulate.c517 uint8_t R:1; member
2571 evex.R = 1; in x86_decode()

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