Searched refs:_1cd (Results 1 – 4 of 4) sorted by relevance
86 cpuidmask_defaults._1cd = _probe_mask_msr(&msr_basic, LCAP_1cd); in probe_masking_msrs()129 uint64_t val = masks->_1cd; in intel_ctxt_switch_masking()140 if (unlikely(these_masks->_1cd != val)) { in intel_ctxt_switch_masking()142 these_masks->_1cd = val; in intel_ctxt_switch_masking()188 cpuidmask_defaults._1cd &= ((u64)edx << 32) | ecx; in intel_init_levelling()219 (uint32_t)(cpuidmask_defaults._1cd >> 32), in intel_init_levelling()220 (uint32_t)cpuidmask_defaults._1cd, in intel_init_levelling()
169 cpuidmask_defaults._1cd = in probe_masking_msrs()215 uint64_t val = masks->_1cd; in amd_ctxt_switch_masking()226 if (unlikely(these_masks->_1cd != val)) { in amd_ctxt_switch_masking()228 these_masks->_1cd = val; in amd_ctxt_switch_masking()300 cpuidmask_defaults._1cd = ((uint64_t)ecx << 32) | edx; in amd_init_levelling()349 (uint32_t)cpuidmask_defaults._1cd, in amd_init_levelling()350 (uint32_t)(cpuidmask_defaults._1cd >> 32), in amd_init_levelling()
48 uint64_t _1cd; member
143 uint64_t mask = cpuidmask_defaults._1cd; in update_domain_cpuid_info()195 d->arch.pv_domain.cpuidmasks->_1cd = mask; in update_domain_cpuid_info()
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