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/xen-4.10.0-shim-comet/tools/blktap2/drivers/
A Dblock-cache.c509 return cache->request_free_list[--cache->requests_free]; in block_cache_get_request()
516 cache->request_free_list[cache->requests_free++] = breq; in block_cache_put_request()
544 tree->cache = cache; in block_cache_open()
547 cache->request_free_list[i] = cache->requests + i; in block_cache_open()
553 cache); in block_cache_open()
559 cache->name, cache->sectors, tree, tree->height); in block_cache_open()
567 free(cache->name); in block_cache_open()
585 free(cache->name); in block_cache_close()
618 cache->name, treq.sec + i, block_cache_hash(cache, iov[i])); in block_cache_hit()
636 cache = breq->cache; in block_cache_populate_cache()
[all …]
A Dtapdisk-vbd.c203 td_image_t *cache, *image, *target, *tmp; in tapdisk_vbd_add_block_cache() local
222 if (!cache) in tapdisk_vbd_add_block_cache()
226 err = td_load(cache); in tapdisk_vbd_add_block_cache()
236 cache->driver = tapdisk_driver_allocate(cache->type, in tapdisk_vbd_add_block_cache()
237 cache->name, in tapdisk_vbd_add_block_cache()
238 cache->flags, in tapdisk_vbd_add_block_cache()
239 cache->storage); in tapdisk_vbd_add_block_cache()
240 if (!cache->driver) { in tapdisk_vbd_add_block_cache()
245 cache->driver->info = target->driver->info; in tapdisk_vbd_add_block_cache()
248 err = td_open(cache); in tapdisk_vbd_add_block_cache()
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A DMakefile71 BLK-OBJS-y += block-cache.o
/xen-4.10.0-shim-comet/docs/misc/
A Dxl-psr.markdown10 the usage of cache (currently only L3 cache supported) by applications running
30 After that, cache usage for the domain can be shown by:
32 `xl psr-cmt-show cache-occupancy <domid>`
73 partition cache allocation (i.e. L3/L2 cache) based on application priority or
79 corresponding cache portion is available.
122 In different systems, the different cache level is supported, e.g. L3 cache or
123 L2 cache. Per cache level cbm can be specified with the `--level LEVEL` option.
133 In different systems, the different cache level is supported, e.g. L3 cache or
134 L2 cache. Per cache level cbm can be specified with the `--level LEVEL` option.
141 cache in a software configurable manner, which can enable workload
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/xen-4.10.0-shim-comet/tools/libfsimage/reiserfs/
A Dfsys_reiserfs.c345 #define BLOCKHEAD(cache) ((struct block_head *) cache) argument
347 #define KEY(cache) ((struct key *) ((char *) cache + BLKH_SIZE)) argument
691 return cache; in read_tree_node()
710 return cache; in read_tree_node()
721 char *cache; in next_key() local
755 cache = ROOT; in next_key()
761 if (! cache) in next_key()
777 if (! cache) in next_key()
811 char *cache; in search_stat() local
821 cache = ROOT; in search_stat()
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/xen-4.10.0-shim-comet/tools/libxc/
A Dxc_compression.c73 struct cache_page *cache; member
462 free(ctx->cache); in xc_compression_free_context()
512 ctx->cache = malloc(num_cache_pages * sizeof(struct cache_page)); in xc_compression_create_context()
513 if (!ctx->cache) in xc_compression_create_context()
521 ctx->cache[i].pfn = INVALID_PFN; in xc_compression_create_context()
522 ctx->cache[i].page = ctx->cache_base + i * XC_PAGE_SIZE; in xc_compression_create_context()
523 ctx->cache[i].prev = (i == 0) ? NULL : &(ctx->cache[i - 1]); in xc_compression_create_context()
524 ctx->cache[i].next = ((i+1) == num_cache_pages)? NULL : in xc_compression_create_context()
525 &(ctx->cache[i + 1]); in xc_compression_create_context()
527 ctx->page_list_head = &(ctx->cache[0]); in xc_compression_create_context()
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/xen-4.10.0-shim-comet/xen/arch/arm/
A DKconfig72 master interface and an L2 cache.
79 The workaround promotes data cache clean instructions to
80 data cache clean-and-invalidate.
98 cluster is executing a cache maintenance operation to the same
99 address, then this erratum might cause a clean cache line to be
102 The workaround promotes data cache clean instructions to
103 data cache clean-and-invalidate.
116 erratum 819472 on Cortex-A53 parts up to r0p1 with an L2 cache
120 the same time as a processor in another cluster is executing a cache
124 The workaround promotes data cache clean instructions to
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/xen-4.10.0-shim-comet/docs/features/
A Dintel_psr_cat_cdp.pandoc35 CAT allows an OS or hypervisor to control allocation of a CPU's shared cache
37 configured using capacity bitmasks (CBMs) which represent cache capacity and
39 nfigured, the processor allows access to portions of cache according to the
42 Intel Goldmont processor provides support for control over the L2 cache.
65 `-l2`: Show cbm for L2 cache.
66 `-l3`: Show cbm for L3 cache.
79 `-l2`: Specify cbm for L2 cache.
80 `-l3`: Specify cbm for L3 cache.
123 CAT/CDP MSRs, setting different L2 cache accessing patterns from L3 cache is
129 other domains contending for the cache.
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/xen-4.10.0-shim-comet/xen/arch/x86/
A Dcpuid.c200 memset(p->cache.raw, 0, sizeof(p->cache.raw)); in recalculate_misc()
258 p->cache.subleaf[i] = u.c; in calculate_raw_policy()
265 if ( i == ARRAY_SIZE(p->cache.raw) ) in calculate_raw_policy()
549 for ( i = 0; i < ARRAY_SIZE(p->cache.raw); ++i ) in recalculate_cpuid_policy()
551 if ( p->cache.subleaf[i].type >= 1 && in recalculate_cpuid_policy()
552 p->cache.subleaf[i].type <= 3 ) in recalculate_cpuid_policy()
555 p->cache.raw[i].a &= 0xffffc3ffu; in recalculate_cpuid_policy()
556 p->cache.raw[i].d &= 0x00000007u; in recalculate_cpuid_policy()
561 zero_leaves(p->cache.raw, i, ARRAY_SIZE(p->cache.raw) - 1); in recalculate_cpuid_policy()
622 if ( subleaf >= ARRAY_SIZE(p->cache.raw) ) in guest_cpuid()
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/xen-4.10.0-shim-comet/xen/arch/x86/hvm/
A Demulate.c882 cache->size += chunk; in hvmemul_phys_mmio_access()
915 struct hvm_mmio_cache *cache; in hvmemul_find_mmio_cache() local
921 if ( gla == cache->gla && in hvmemul_find_mmio_cache()
922 dir == cache->dir ) in hvmemul_find_mmio_cache()
923 return cache; in hvmemul_find_mmio_cache()
933 cache = &vio->mmio_cache[i]; in hvmemul_find_mmio_cache()
934 memset(cache, 0, sizeof (*cache)); in hvmemul_find_mmio_cache()
936 cache->gla = gla; in hvmemul_find_mmio_cache()
937 cache->dir = dir; in hvmemul_find_mmio_cache()
939 return cache; in hvmemul_find_mmio_cache()
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A Dstdvga.c114 if ( s->cache != STDVGA_CACHE_UNINITIALIZED ) in stdvga_try_cache_enable()
118 s->cache = STDVGA_CACHE_ENABLED; in stdvga_try_cache_enable()
123 if ( s->cache != STDVGA_CACHE_ENABLED ) in stdvga_cache_disable()
127 s->cache = STDVGA_CACHE_DISABLED; in stdvga_cache_disable()
132 return s->cache == STDVGA_CACHE_ENABLED; in stdvga_cache_is_enabled()
/xen-4.10.0-shim-comet/xen/arch/arm/arm64/
A DMakefile3 obj-y += cache.o
/xen-4.10.0-shim-comet/docs/
A DChangeLog110 16504: flush cache disk op
114 underlying storage to flush its cache upon receiving this request.
115 Backend advertises availability via 'feature-flush-cache' xenstore node.
116 Needed for correct behaviour of disk-cache-aware filesystems such as
A Dconfigure1241 --cache-file=FILE cache test results in FILE [disabled]
1242 -C, --config-cache alias for \`--cache-file=config.cache'
1669 { $as_echo "$as_me:${as_lineno-$LINENO}: loading cache $cache_file" >&5
1670 $as_echo "$as_me: loading cache $cache_file" >&6;}
1677 { $as_echo "$as_me:${as_lineno-$LINENO}: creating cache $cache_file" >&5
1678 $as_echo "$as_me: creating cache $cache_file" >&6;}
A DMakefile90 rm -rf $(XEN_ROOT)/config/Docs.mk config.log config.status config.cache \
91 autom4te.cache
/xen-4.10.0-shim-comet/
A Dconfigure1251 --cache-file=FILE cache test results in FILE [disabled]
1252 -C, --config-cache alias for \`--cache-file=config.cache'
1682 { $as_echo "$as_me:${as_lineno-$LINENO}: loading cache $cache_file" >&5
1683 $as_echo "$as_me: loading cache $cache_file" >&6;}
1690 { $as_echo "$as_me:${as_lineno-$LINENO}: creating cache $cache_file" >&5
1691 $as_echo "$as_me: creating cache $cache_file" >&6;}
3587 …ineno-$LINENO}: running $SHELL $ac_sub_configure $ac_sub_configure_args --cache-file=$ac_sub_cache…
3588 $as_echo "$as_me: running $SHELL $ac_sub_configure $ac_sub_configure_args --cache-file=$ac_sub_cach…
A D.gitignore37 autom4te.cache/
40 config.cache
58 stubdom/autom4te.cache/
60 stubdom/config.cache
94 tools/autom4te.cache/
98 tools/config.cache
A DMakefile234 rm -rf config.log config.status config.cache autom4te.cache
/xen-4.10.0-shim-comet/xen/include/asm-x86/hvm/
A Dio.h141 enum stdvga_cache_state cache; member
/xen-4.10.0-shim-comet/tools/
A DMakefile94 config.cache autom4te.cache
A Dconfigure942 -cache-file | --cache-file | --cache-fil | --cache-fi \
943 | --cache-f | --cache- | --cache | --cach | --cac | --ca | --c)
945 -cache-file=* | --cache-file=* | --cache-fil=* | --cache-fi=* \
946 | --cache-f=* | --cache-=* | --cache=* | --cach=* | --cac=* | --ca=* | --c=*)
949 --config-cache | -C)
950 cache_file=config.cache ;;
1423 --cache-file=FILE cache test results in FILE [disabled]
1424 -C, --config-cache alias for \`--cache-file=config.cache'
2346 $as_echo "$as_me: loading cache $cache_file" >&6;}
2353 { $as_echo "$as_me:${as_lineno-$LINENO}: creating cache $cache_file" >&5
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/xen-4.10.0-shim-comet/stubdom/
A Dconfigure1280 --cache-file=FILE cache test results in FILE [disabled]
1281 -C, --config-cache alias for \`--cache-file=config.cache'
1763 { $as_echo "$as_me:${as_lineno-$LINENO}: loading cache $cache_file" >&5
1764 $as_echo "$as_me: loading cache $cache_file" >&6;}
1771 { $as_echo "$as_me:${as_lineno-$LINENO}: creating cache $cache_file" >&5
1772 $as_echo "$as_me: creating cache $cache_file" >&6;}
/xen-4.10.0-shim-comet/docs/man/
A Dxl.pod.1.in1755 example, L3 cache occupancy. In the Xen implementation, the monitoring
1762 additional monitoring types. Both memory bandwidth monitoring and L3 cache
1767 There is no cache monitoring and memory bandwidth monitoring on L2 cache so
1784 - "cache-occupancy": showing the L3 cache occupancy(KB).
1794 cache resources (i.e. L3/L2 cache) to be made available for high priority
1795 applications. In the Xen implementation, CAT is used to control cache allocation
1796 on VM basis. To enforce cache on a specific domain, just set capacity bitmasks
1800 (CDP) for cache allocations, which support specifying code or data cache for
1810 Set cache capacity bitmasks(CBM) for a domain. For how to specify I<cbm>
1823 Specify the cache level to process, otherwise the last level cache (L3) is
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/xen-4.10.0-shim-comet/xen/include/asm-x86/
A Dcpuid.h122 } cache; member
/xen-4.10.0-shim-comet/xen/common/
A DKconfig118 prompt "Maintain statistics on the FLASK access vector cache" if EXPERT = "y"
121 Maintain counters on the access vector cache that can be viewed using

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