1 /* 2 * cpufeature.h 3 * 4 * Defines x86 CPU feature bits 5 */ 6 #ifndef __ASM_I386_CPUFEATURE_H 7 #define __ASM_I386_CPUFEATURE_H 8 9 #include <xen/const.h> 10 #include <asm/cpuid.h> 11 12 #define cpufeat_word(idx) ((idx) / 32) 13 #define cpufeat_bit(idx) ((idx) % 32) 14 #define cpufeat_mask(idx) (_AC(1, U) << cpufeat_bit(idx)) 15 16 /* An alias of a feature we know is always going to be present. */ 17 #define X86_FEATURE_ALWAYS X86_FEATURE_LM 18 19 #ifndef __ASSEMBLY__ 20 #include <xen/bitops.h> 21 22 #define cpu_has(c, bit) test_bit(bit, (c)->x86_capability) 23 #define boot_cpu_has(bit) test_bit(bit, boot_cpu_data.x86_capability) 24 25 #define CPUID_MWAIT_LEAF 5 26 #define CPUID5_ECX_EXTENSIONS_SUPPORTED 0x1 27 #define CPUID5_ECX_INTERRUPT_BREAK 0x2 28 29 #define CPUID_PM_LEAF 6 30 #define CPUID6_ECX_APERFMPERF_CAPABILITY 0x1 31 32 /* CPUID level 0x00000001.edx */ 33 #define cpu_has_fpu 1 34 #define cpu_has_de 1 35 #define cpu_has_pse 1 36 #define cpu_has_apic boot_cpu_has(X86_FEATURE_APIC) 37 #define cpu_has_sep boot_cpu_has(X86_FEATURE_SEP) 38 #define cpu_has_mtrr 1 39 #define cpu_has_pge 1 40 #define cpu_has_pat 1 41 #define cpu_has_pse36 boot_cpu_has(X86_FEATURE_PSE36) 42 #define cpu_has_clflush boot_cpu_has(X86_FEATURE_CLFLUSH) 43 #define cpu_has_mmx 1 44 #define cpu_has_htt boot_cpu_has(X86_FEATURE_HTT) 45 46 /* CPUID level 0x00000001.ecx */ 47 #define cpu_has_sse3 boot_cpu_has(X86_FEATURE_SSE3) 48 #define cpu_has_pclmulqdq boot_cpu_has(X86_FEATURE_PCLMULQDQ) 49 #define cpu_has_monitor boot_cpu_has(X86_FEATURE_MONITOR) 50 #define cpu_has_vmx boot_cpu_has(X86_FEATURE_VMX) 51 #define cpu_has_eist boot_cpu_has(X86_FEATURE_EIST) 52 #define cpu_has_ssse3 boot_cpu_has(X86_FEATURE_SSSE3) 53 #define cpu_has_cx16 boot_cpu_has(X86_FEATURE_CX16) 54 #define cpu_has_pdcm boot_cpu_has(X86_FEATURE_PDCM) 55 #define cpu_has_pcid boot_cpu_has(X86_FEATURE_PCID) 56 #define cpu_has_sse4_1 boot_cpu_has(X86_FEATURE_SSE4_1) 57 #define cpu_has_sse4_2 boot_cpu_has(X86_FEATURE_SSE4_2) 58 #define cpu_has_x2apic boot_cpu_has(X86_FEATURE_X2APIC) 59 #define cpu_has_popcnt boot_cpu_has(X86_FEATURE_POPCNT) 60 #define cpu_has_aesni boot_cpu_has(X86_FEATURE_AESNI) 61 #define cpu_has_xsave boot_cpu_has(X86_FEATURE_XSAVE) 62 #define cpu_has_avx boot_cpu_has(X86_FEATURE_AVX) 63 #define cpu_has_rdrand boot_cpu_has(X86_FEATURE_RDRAND) 64 #define cpu_has_hypervisor boot_cpu_has(X86_FEATURE_HYPERVISOR) 65 66 /* CPUID level 0x80000001.edx */ 67 #define cpu_has_nx boot_cpu_has(X86_FEATURE_NX) 68 #define cpu_has_ffxsr ((boot_cpu_data.x86_vendor == X86_VENDOR_AMD) \ 69 && boot_cpu_has(X86_FEATURE_FFXSR)) 70 #define cpu_has_page1gb boot_cpu_has(X86_FEATURE_PAGE1GB) 71 #define cpu_has_rdtscp boot_cpu_has(X86_FEATURE_RDTSCP) 72 73 /* CPUID level 0x80000001.ecx */ 74 #define cpu_has_cmp_legacy boot_cpu_has(X86_FEATURE_CMP_LEGACY) 75 #define cpu_has_svm boot_cpu_has(X86_FEATURE_SVM) 76 #define cpu_has_sse4a boot_cpu_has(X86_FEATURE_SSE4A) 77 #define cpu_has_lwp boot_cpu_has(X86_FEATURE_LWP) 78 #define cpu_has_tbm boot_cpu_has(X86_FEATURE_TBM) 79 80 /* CPUID level 0x0000000D:1.eax */ 81 #define cpu_has_xsaveopt boot_cpu_has(X86_FEATURE_XSAVEOPT) 82 #define cpu_has_xsavec boot_cpu_has(X86_FEATURE_XSAVEC) 83 #define cpu_has_xgetbv1 boot_cpu_has(X86_FEATURE_XGETBV1) 84 #define cpu_has_xsaves boot_cpu_has(X86_FEATURE_XSAVES) 85 86 /* CPUID level 0x00000007:0.ebx */ 87 #define cpu_has_fsgsbase boot_cpu_has(X86_FEATURE_FSGSBASE) 88 #define cpu_has_bmi1 boot_cpu_has(X86_FEATURE_BMI1) 89 #define cpu_has_hle boot_cpu_has(X86_FEATURE_HLE) 90 #define cpu_has_avx2 boot_cpu_has(X86_FEATURE_AVX2) 91 #define cpu_has_smep boot_cpu_has(X86_FEATURE_SMEP) 92 #define cpu_has_bmi2 boot_cpu_has(X86_FEATURE_BMI2) 93 #define cpu_has_rtm boot_cpu_has(X86_FEATURE_RTM) 94 #define cpu_has_fpu_sel (!boot_cpu_has(X86_FEATURE_NO_FPU_SEL)) 95 #define cpu_has_mpx boot_cpu_has(X86_FEATURE_MPX) 96 #define cpu_has_rdseed boot_cpu_has(X86_FEATURE_RDSEED) 97 #define cpu_has_smap boot_cpu_has(X86_FEATURE_SMAP) 98 #define cpu_has_sha boot_cpu_has(X86_FEATURE_SHA) 99 100 /* CPUID level 0x80000007.edx */ 101 #define cpu_has_itsc boot_cpu_has(X86_FEATURE_ITSC) 102 103 /* Synthesized. */ 104 #define cpu_has_arch_perfmon boot_cpu_has(X86_FEATURE_ARCH_PERFMON) 105 #define cpu_has_cpuid_faulting boot_cpu_has(X86_FEATURE_CPUID_FAULTING) 106 #define cpu_has_aperfmperf boot_cpu_has(X86_FEATURE_APERFMPERF) 107 108 enum _cache_type { 109 CACHE_TYPE_NULL = 0, 110 CACHE_TYPE_DATA = 1, 111 CACHE_TYPE_INST = 2, 112 CACHE_TYPE_UNIFIED = 3 113 }; 114 115 union _cpuid4_leaf_eax { 116 struct { 117 enum _cache_type type:5; 118 unsigned int level:3; 119 unsigned int is_self_initializing:1; 120 unsigned int is_fully_associative:1; 121 unsigned int reserved:4; 122 unsigned int num_threads_sharing:12; 123 unsigned int num_cores_on_die:6; 124 } split; 125 u32 full; 126 }; 127 128 union _cpuid4_leaf_ebx { 129 struct { 130 unsigned int coherency_line_size:12; 131 unsigned int physical_line_partition:10; 132 unsigned int ways_of_associativity:10; 133 } split; 134 u32 full; 135 }; 136 137 union _cpuid4_leaf_ecx { 138 struct { 139 unsigned int number_of_sets:32; 140 } split; 141 u32 full; 142 }; 143 144 struct cpuid4_info { 145 union _cpuid4_leaf_eax eax; 146 union _cpuid4_leaf_ebx ebx; 147 union _cpuid4_leaf_ecx ecx; 148 unsigned long size; 149 }; 150 151 int cpuid4_cache_lookup(int index, struct cpuid4_info *this_leaf); 152 #endif /* !__ASSEMBLY__ */ 153 154 #endif /* __ASM_I386_CPUFEATURE_H */ 155 156 /* 157 * Local Variables: 158 * mode:c 159 * comment-column:42 160 * End: 161 */ 162