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Searched refs:dr_mask (Results 1 – 6 of 6) sorted by relevance

/xen-4.10.0-shim-comet/xen/arch/x86/hvm/svm/
A Dsvm.c184 rdmsrl(MSR_AMD64_DR0_ADDRESS_MASK, v->arch.hvm_svm.dr_mask[0]); in svm_save_dr()
185 rdmsrl(MSR_AMD64_DR1_ADDRESS_MASK, v->arch.hvm_svm.dr_mask[1]); in svm_save_dr()
186 rdmsrl(MSR_AMD64_DR2_ADDRESS_MASK, v->arch.hvm_svm.dr_mask[2]); in svm_save_dr()
187 rdmsrl(MSR_AMD64_DR3_ADDRESS_MASK, v->arch.hvm_svm.dr_mask[3]); in svm_save_dr()
406 ctxt->msr[ctxt->count].val = v->arch.hvm_svm.dr_mask[0]; in svm_save_msr()
410 ctxt->msr[ctxt->count].val = v->arch.hvm_svm.dr_mask[1]; in svm_save_msr()
414 ctxt->msr[ctxt->count].val = v->arch.hvm_svm.dr_mask[2]; in svm_save_msr()
418 ctxt->msr[ctxt->count].val = v->arch.hvm_svm.dr_mask[3]; in svm_save_msr()
439 v->arch.hvm_svm.dr_mask[0] = ctxt->msr[i].val; in svm_load_msr()
1915 *msr_content = v->arch.hvm_svm.dr_mask[0]; in svm_msr_read_intercept()
[all …]
/xen-4.10.0-shim-comet/xen/arch/x86/
A Ddomctl.c1362 if ( v->arch.pv_vcpu.dr_mask[0] ) in arch_do_domctl()
1368 msr.value = v->arch.pv_vcpu.dr_mask[0]; in arch_do_domctl()
1377 if ( !v->arch.pv_vcpu.dr_mask[1 + j] ) in arch_do_domctl()
1383 msr.value = v->arch.pv_vcpu.dr_mask[1 + j]; in arch_do_domctl()
1427 v->arch.pv_vcpu.dr_mask[0] = msr.value; in arch_do_domctl()
1436 v->arch.pv_vcpu.dr_mask[msr.index] = msr.value; in arch_do_domctl()
A Dtraps.c1970 wrmsrl(MSR_AMD64_DR0_ADDRESS_MASK, curr->arch.pv_vcpu.dr_mask[0]); in activate_debugregs()
1971 wrmsrl(MSR_AMD64_DR1_ADDRESS_MASK, curr->arch.pv_vcpu.dr_mask[1]); in activate_debugregs()
1972 wrmsrl(MSR_AMD64_DR2_ADDRESS_MASK, curr->arch.pv_vcpu.dr_mask[2]); in activate_debugregs()
1973 wrmsrl(MSR_AMD64_DR3_ADDRESS_MASK, curr->arch.pv_vcpu.dr_mask[3]); in activate_debugregs()
/xen-4.10.0-shim-comet/xen/arch/x86/pv/
A Demul-priv-op.c939 *val = curr->arch.pv_vcpu.dr_mask[0]; in read_msr()
945 *val = curr->arch.pv_vcpu.dr_mask[reg - MSR_AMD64_DR1_ADDRESS_MASK + 1]; in read_msr()
1137 curr->arch.pv_vcpu.dr_mask[0] = val; in write_msr()
1145 curr->arch.pv_vcpu.dr_mask[reg - MSR_AMD64_DR1_ADDRESS_MASK + 1] = val; in write_msr()
/xen-4.10.0-shim-comet/xen/include/asm-x86/
A Ddomain.h497 uint32_t dr_mask[4]; member
/xen-4.10.0-shim-comet/xen/include/asm-x86/hvm/svm/
A Dvmcb.h519 uint32_t dr_mask[4]; member

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