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Searched refs:erratum (Results 1 – 4 of 4) sorted by relevance

/xen-4.10.0-shim-comet/xen/include/asm-arm/
A Dcpuerrata.h11 #define CHECK_WORKAROUND_HELPER(erratum, feature, arch) \ argument
12 static inline bool check_workaround_##erratum(void) \
31 #define CHECK_WORKAROUND_HELPER(erratum, feature, arch) \ argument
32 static inline bool check_workaround_##erratum(void) \
/xen-4.10.0-shim-comet/xen/arch/arm/
A DKconfig71 erratum 827319 on Cortex-A53 parts up to r0p2 with an AMBA 5 CHI
74 Under certain conditions this erratum can cause a clean line eviction
93 erratum 824069 on Cortex-A53 parts up to r0p2 when it is connected
99 address, then this erratum might cause a clean cache line to be
116 erratum 819472 on Cortex-A53 parts up to r0p1 with an L2 cache
121 maintenance operation to the same address, then this erratum might
138 erratum 832075 on Cortex-A57 parts up to r1p2.
157 erratum 834220 on Cortex-A57 parts up to r1p2.
/xen-4.10.0-shim-comet/docs/misc/arm/
A Dsilicon-errata.txt23 erratum into a Category C erratum. These are collectively known as
29 the erratum in question, a Kconfig entry is added under "ARM errata
34 with a comment) in such a way that the erratum will not be hit.
/xen-4.10.0-shim-comet/docs/misc/
A Dxen-command-line.markdown158 * AMD Erratum 121. Processors with this erratum are subject to a guest

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