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Searched refs:hvm_domain (Results 1 – 25 of 47) sorted by relevance

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/xen-4.10.0-shim-comet/xen/arch/x86/hvm/
A Dioreq.c194 *gfn = d->arch.hvm_domain.ioreq_gfn.base + i; in hvm_alloc_ioreq_gfn()
208 set_bit(i, &d->arch.hvm_domain.ioreq_gfn.mask); in hvm_free_ioreq_gfn()
664 id = d->arch.hvm_domain.ioreq_server.id; in next_ioservid()
678 d->arch.hvm_domain.ioreq_server.id = id; in next_ioservid()
711 &d->arch.hvm_domain.ioreq_server.list); in hvm_create_ioreq_server()
715 d->arch.hvm_domain.default_ioreq_server = s; in hvm_create_ioreq_server()
1120 s = d->arch.hvm_domain.default_ioreq_server; in hvm_set_dm_domain()
1178 return d->arch.hvm_domain.default_ioreq_server; in hvm_select_ioreq_server()
1180 cf8 = d->arch.hvm_domain.pci_cf8; in hvm_select_ioreq_server()
1260 return d->arch.hvm_domain.default_ioreq_server; in hvm_select_ioreq_server()
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A Dpmtimer.c71 PMTState *s = &d->arch.hvm_domain.pl_time->vpmt; in hvm_acpi_power_button()
77 d->arch.hvm_domain.acpi.pm1a_sts |= PWRBTN_STS; in hvm_acpi_power_button()
84 PMTState *s = &d->arch.hvm_domain.pl_time->vpmt; in hvm_acpi_sleep_button()
90 d->arch.hvm_domain.acpi.pm1a_sts |= PWRBTN_STS; in hvm_acpi_sleep_button()
165 ((v->domain->arch.hvm_domain.params[ in handle_evt_io()
254 struct hvm_hw_acpi *acpi = &d->arch.hvm_domain.acpi; in acpi_save()
255 PMTState *s = &d->arch.hvm_domain.pl_time->vpmt; in acpi_save()
285 struct hvm_hw_acpi *acpi = &d->arch.hvm_domain.acpi; in acpi_load()
286 PMTState *s = &d->arch.hvm_domain.pl_time->vpmt; in acpi_load()
373 PMTState *s = &d->arch.hvm_domain.pl_time->vpmt; in pmtimer_deinit()
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A Dvioapic.c217 spin_lock(&d->arch.hvm_domain.irq_lock); in vioapic_write_redirent()
267 spin_unlock(&d->arch.hvm_domain.irq_lock); in vioapic_write_redirent()
504 spin_lock(&d->arch.hvm_domain.irq_lock); in vioapic_update_EOI()
536 spin_unlock(&d->arch.hvm_domain.irq_lock); in vioapic_update_EOI()
582 d->arch.hvm_domain.nr_vioapics != 1 ) in ioapic_save()
598 d->arch.hvm_domain.nr_vioapics != 1 ) in ioapic_load()
612 ASSERT(!d->arch.hvm_domain.nr_vioapics); in vioapic_reset()
649 xfree(d->arch.hvm_domain.vioapic); in vioapic_free()
658 ASSERT(!d->arch.hvm_domain.nr_vioapics); in vioapic_init()
664 if ( (d->arch.hvm_domain.vioapic == NULL) && in vioapic_init()
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A Dirq.c90 spin_lock(&d->arch.hvm_domain.irq_lock); in hvm_pci_intx_assert()
92 spin_unlock(&d->arch.hvm_domain.irq_lock); in hvm_pci_intx_assert()
124 spin_lock(&d->arch.hvm_domain.irq_lock); in hvm_pci_intx_deassert()
126 spin_unlock(&d->arch.hvm_domain.irq_lock); in hvm_pci_intx_deassert()
147 spin_lock(&d->arch.hvm_domain.irq_lock); in hvm_gsi_assert()
166 spin_lock(&d->arch.hvm_domain.irq_lock); in hvm_gsi_deassert()
181 spin_lock(&d->arch.hvm_domain.irq_lock); in hvm_isa_irq_assert()
203 spin_lock(&d->arch.hvm_domain.irq_lock); in hvm_isa_irq_deassert()
220 spin_lock(&d->arch.hvm_domain.irq_lock); in hvm_set_callback_irq_level()
299 spin_lock(&d->arch.hvm_domain.irq_lock); in hvm_set_pci_link_route()
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A Dviridian.c304 goi = &d->arch.hvm_domain.viridian.guest_os_id; in dump_guest_os_id()
318 hg = &d->arch.hvm_domain.viridian.hypercall_gpa; in dump_hypercall()
339 rt = &d->arch.hvm_domain.viridian.reference_tsc; in dump_reference_tsc()
571 d->arch.hvm_domain.viridian.guest_os_id.raw = val; in wrmsr_viridian_regs()
577 d->arch.hvm_domain.viridian.hypercall_gpa.raw = val; in wrmsr_viridian_regs()
623 d->arch.hvm_domain.viridian.reference_tsc.raw = val; in wrmsr_viridian_regs()
686 trc = &d->arch.hvm_domain.viridian.time_ref_count; in viridian_time_ref_count_freeze()
696 trc = &d->arch.hvm_domain.viridian.time_ref_count; in viridian_time_ref_count_thaw()
715 *val = d->arch.hvm_domain.viridian.guest_os_id.raw; in rdmsr_viridian_regs()
720 *val = d->arch.hvm_domain.viridian.hypercall_gpa.raw; in rdmsr_viridian_regs()
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A Dvpic.c38 arch.hvm_domain.vpic[!vpic->is_master]))
39 #define __vpic_lock(v) &container_of((v), struct hvm_domain, \
115 struct vcpu *v = vpic_domain(vpic)->arch.hvm_domain.i8259_target; in vpic_update_int_output()
337 vpic = &current->domain->arch.hvm_domain.vpic[port >> 7]; in vpic_intercept_pic_io()
355 vpic = &current->domain->arch.hvm_domain.vpic[port & 1]; in vpic_intercept_elcr_io()
385 s = &d->arch.hvm_domain.vpic[i]; in vpic_save()
405 s = &d->arch.hvm_domain.vpic[inst]; in vpic_load()
424 vpic = &d->arch.hvm_domain.vpic[0]; in vpic_reset()
450 struct hvm_hw_vpic *vpic = &d->arch.hvm_domain.vpic[irq >> 3]; in vpic_irq_positive_edge()
468 struct hvm_hw_vpic *vpic = &d->arch.hvm_domain.vpic[irq >> 3]; in vpic_irq_negative_edge()
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A Dintercept.c222 for ( i = 0; i < curr_d->arch.hvm_domain.io_handler_count; i++ ) in hvm_find_io_handler()
225 &curr_d->arch.hvm_domain.io_handler[i]; in hvm_find_io_handler()
260 unsigned int i = d->arch.hvm_domain.io_handler_count++; in hvm_next_io_handler()
262 ASSERT(d->arch.hvm_domain.io_handler); in hvm_next_io_handler()
270 return &d->arch.hvm_domain.io_handler[i]; in hvm_next_io_handler()
306 for ( i = 0; i < d->arch.hvm_domain.io_handler_count; i++ ) in relocate_portio_handler()
309 &d->arch.hvm_domain.io_handler[i]; in relocate_portio_handler()
A Dstdvga.c137 struct hvm_hw_stdvga *s = &current->domain->arch.hvm_domain.stdvga; in stdvga_outb()
205 struct hvm_hw_stdvga *s = &current->domain->arch.hvm_domain.stdvga; in stdvga_intercept_pio()
255 struct hvm_hw_stdvga *s = &current->domain->arch.hvm_domain.stdvga; in stdvga_mem_readb()
350 struct hvm_hw_stdvga *s = &current->domain->arch.hvm_domain.stdvga; in stdvga_mem_writeb()
460 struct hvm_hw_stdvga *s = &current->domain->arch.hvm_domain.stdvga; in stdvga_mem_write()
520 struct hvm_hw_stdvga *s = &current->domain->arch.hvm_domain.stdvga; in stdvga_mem_accept()
563 struct hvm_hw_stdvga *s = &current->domain->arch.hvm_domain.stdvga; in stdvga_mem_complete()
577 struct hvm_hw_stdvga *s = &d->arch.hvm_domain.stdvga; in stdvga_init()
618 struct hvm_hw_stdvga *s = &d->arch.hvm_domain.stdvga; in stdvga_deinit()
A Dhvm.c604 if ( !d->arch.hvm_domain.pl_time || !d->arch.hvm_domain.irq || in hvm_domain_initialise()
605 !d->arch.hvm_domain.params || !d->arch.hvm_domain.io_handler ) in hvm_domain_initialise()
668 xfree(d->arch.hvm_domain.params); in hvm_domain_initialise()
669 xfree(d->arch.hvm_domain.pl_time); in hvm_domain_initialise()
670 xfree(d->arch.hvm_domain.irq); in hvm_domain_initialise()
706 xfree(d->arch.hvm_domain.params); in hvm_domain_destroy()
707 d->arch.hvm_domain.params = NULL; in hvm_domain_destroy()
716 xfree(d->arch.hvm_domain.pl_time); in hvm_domain_destroy()
717 d->arch.hvm_domain.pl_time = NULL; in hvm_domain_destroy()
719 xfree(d->arch.hvm_domain.irq); in hvm_domain_destroy()
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A Dvpt.c27 ((d)->arch.hvm_domain.params[HVM_PARAM_TIMER_MODE] == HVMPTM_##name)
31 struct pl_time *pl = d->arch.hvm_domain.pl_time; in hvm_init_guest_time()
40 struct pl_time *pl = v->domain->arch.hvm_domain.pl_time; in hvm_get_guest_time_fixed()
91 return (v->domain->arch.hvm_domain.vpic[isa_irq >> 3].irq_base in pt_irq_vector()
123 pic_imr = v->domain->arch.hvm_domain.vpic[isa_irq >> 3].imr; in pt_irq_masked()
309 v->domain->arch.hvm_domain.vpic[irq >> 3].int_output ) in pt_update_irq()
449 if ( v->domain->arch.hvm_domain.params[HVM_PARAM_VPT_ALIGN] ) in create_periodic_time()
540 pl_time = v->domain->arch.hvm_domain.pl_time; in pt_adjust_global_vcpu_target()
575 pt_resume(&d->arch.hvm_domain.pl_time->vrtc.pt); in pt_may_unmask_irq()
577 pt_resume(&d->arch.hvm_domain.pl_time->vhpet.pt[i]); in pt_may_unmask_irq()
A Dio.c178 const struct hvm_domain *hvm_domain = &curr->domain->arch.hvm_domain; in g2m_portio_accept() local
183 list_for_each_entry( g2m_ioport, &hvm_domain->g2m_ioport_list, list ) in g2m_portio_accept()
A Dvmsi.c174 return !!d->arch.hvm_domain.msixtbl_list.next; in msixtbl_initialised()
183 list_for_each_entry( entry, &d->arch.hvm_domain.msixtbl_list, list ) in msixtbl_find_entry()
431 list_add_rcu(&entry->list, &d->arch.hvm_domain.msixtbl_list); in add_msixtbl_entry()
484 list_for_each_entry( entry, &d->arch.hvm_domain.msixtbl_list, list ) in msixtbl_pt_register()
543 list_for_each_entry( entry, &d->arch.hvm_domain.msixtbl_list, list ) in msixtbl_pt_unregister()
565 INIT_LIST_HEAD(&d->arch.hvm_domain.msixtbl_list); in msixtbl_init()
585 &d->arch.hvm_domain.msixtbl_list, list ) in msixtbl_pt_cleanup()
A Dnestedhvm.c32 return is_hvm_domain(d) && d->arch.hvm_domain.params && in nestedhvm_enabled()
33 d->arch.hvm_domain.params[HVM_PARAM_NESTEDHVM]; in nestedhvm_enabled()
A Dhypercall.c44 curr->domain->arch.hvm_domain.qemu_mapcache_invalidate = true; in hvm_memory_op()
284 if ( unlikely(currd->arch.hvm_domain.qemu_mapcache_invalidate) && in hvm_hypercall()
285 test_and_clear_bool(currd->arch.hvm_domain.qemu_mapcache_invalidate) ) in hvm_hypercall()
A Dmtrr.c518 INIT_LIST_HEAD(&d->arch.hvm_domain.pinned_cacheattr_ranges); in hvm_init_cacheattr_region_list()
523 struct list_head *head = &d->arch.hvm_domain.pinned_cacheattr_ranges; in hvm_destroy_cacheattr_region_list()
547 &d->arch.hvm_domain.pinned_cacheattr_ranges, in hvm_get_mem_pinned_cacheattr()
591 &d->arch.hvm_domain.pinned_cacheattr_ranges, in hvm_set_mem_pinned_cacheattr()
634 &d->arch.hvm_domain.pinned_cacheattr_ranges, in hvm_set_mem_pinned_cacheattr()
661 list_add_rcu(&range->list, &d->arch.hvm_domain.pinned_cacheattr_ranges); in hvm_set_mem_pinned_cacheattr()
787 if ( (mfn_x(mfn) ^ d->arch.hvm_domain.vmx.apic_access_mfn) >> order ) in epte_get_entry_emt()
A Dsave.c42 d->arch.hvm_domain.sync_tsc = rdtsc(); in arch_hvm_save()
77 d->arch.hvm_domain.sync_tsc = rdtsc(); in arch_hvm_load()
80 d->arch.hvm_domain.stdvga.cache = STDVGA_CACHE_DISABLED; in arch_hvm_load()
/xen-4.10.0-shim-comet/tools/tests/vhpet/
A Dmain.c261 dom1.arch.hvm_domain.pl_time.vhpet.hpet.mc64, in create_periodic_time()
262 dom1.arch.hvm_domain.pl_time.vhpet.hpet.mc64, in create_periodic_time()
263 dom1.arch.hvm_domain.pl_time.vhpet.mc_offset, in create_periodic_time()
264 dom1.arch.hvm_domain.pl_time.vhpet.mc_offset); in create_periodic_time()
460 dom1.arch.hvm_domain.pl_time.vhpet.hpet.period[timer], in hpet_check_stopped()
647 dom1.arch.hvm_domain.pl_time.vhpet.hpet.mc64 = START_MC64; in main()
648 dom1.arch.hvm_domain.pl_time.vhpet.mc_offset = START_MC64 in main()
652 dom1.arch.hvm_domain.pl_time.vhpet.hpet.mc64, in main()
653 dom1.arch.hvm_domain.pl_time.vhpet.hpet.mc64, in main()
654 dom1.arch.hvm_domain.pl_time.vhpet.mc_offset, in main()
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A Demul.h210 struct hvm_domain struct
218 struct hvm_domain hvm_domain; argument
/xen-4.10.0-shim-comet/xen/arch/arm/
A Dhvm.c62 d->arch.hvm_domain.params[a.index] = a.value; in do_hvm_op()
66 a.value = d->arch.hvm_domain.params[a.index]; in do_hvm_op()
/xen-4.10.0-shim-comet/xen/include/asm-x86/hvm/
A Ddomain.h103 struct hvm_domain { struct
201 #define hap_enabled(d) ((d)->arch.hvm_domain.hap_enabled) argument
A Dvpt.h151 (is_hvm_domain(d) && (d)->arch.hvm_domain.i8259_target ? \
152 (d)->arch.hvm_domain.i8259_target : \
A Dhvm.h266 ((d)->arch.hvm_domain.tsc_scaling_ratio)
381 ((d)->arch.hvm_domain.params != NULL)
384 (has_hvm_params(d) ? (d)->arch.hvm_domain.params[HVM_PARAM_VIRIDIAN] : 0)
627 (d_->arch.hvm_domain.pi_ops.vcpu_block) ) \
628 d_->arch.hvm_domain.pi_ops.vcpu_block(v_); \
A Dvioapic.h61 #define domain_vioapic(d, i) ((d)->arch.hvm_domain.vioapic[i])
/xen-4.10.0-shim-comet/xen/include/asm-arm/
A Ddomain.h16 struct hvm_domain struct
53 struct hvm_domain hvm_domain; member
/xen-4.10.0-shim-comet/xen/arch/x86/mm/hap/
A Dhap.c92 dirty_vram = d->arch.hvm_domain.dirty_vram; in hap_track_dirty_vram()
102 d->arch.hvm_domain.dirty_vram = dirty_vram; in hap_track_dirty_vram()
154 dirty_vram = d->arch.hvm_domain.dirty_vram; in hap_track_dirty_vram()
164 d->arch.hvm_domain.dirty_vram = NULL; in hap_track_dirty_vram()
588 xfree(d->arch.hvm_domain.dirty_vram); in hap_teardown()
589 d->arch.hvm_domain.dirty_vram = NULL; in hap_teardown()

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