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Searched refs:isb (Results 1 – 20 of 20) sorted by relevance

/xen-4.10.0-shim-comet/xen/include/asm-arm/arm32/
A Dflushtlb.h12 isb(); in flush_tlb_local()
23 isb(); in flush_tlb()
34 isb(); in flush_tlb_all_local()
45 isb(); in flush_tlb_all()
A Dpage.h45 isb(); /* Synchronize fetched instruction stream. */ in invalidate_icache()
102 isb(); /* Ensure result is available. */ in __va_to_par()
117 isb(); /* Ensure result is available. */ in gva_to_ma_par()
130 isb(); /* Ensure result is available. */ in gva_to_ipa_par()
/xen-4.10.0-shim-comet/xen/include/asm-arm/arm64/
A Dpage.h37 isb(); in invalidate_icache()
93 isb(); in __va_to_par()
108 isb(); in gva_to_ma_par()
122 isb(); in gva_to_ipa_par()
/xen-4.10.0-shim-comet/xen/arch/arm/arm64/
A Dhead.S518 isb /* Now, flush the icache */
560 isb
563 isb
578 isb
581 isb
654 isb /* Ensure synchronization with previous
659 isb
663 isb /* Ensure synchronization with previous
668 isb
775 isb
A Dentry.S359 isb
/xen-4.10.0-shim-comet/xen/arch/arm/arm32/
A Dhead.S368 isb /* Now, flush the icache */
416 isb
419 isb
437 isb
442 isb
519 isb /* Ensure synchronization with previous
525 isb
531 isb /* Ensure synchronization with previous
537 isb
A Dentry.S89 isb
/xen-4.10.0-shim-comet/xen/arch/arm/platforms/
A Dvexpress.c117 dsb(sy); isb(); in vexpress_reset()
120 dsb(sy); isb(); in vexpress_reset()
/xen-4.10.0-shim-comet/xen/arch/arm/
A Dtime.c214 isb(); in reprogram_timer()
302 isb(); in init_timer_interrupt()
323 isb(); in udelay()
A Dgic-v3.c242 isb(); in gicv3_ich_write_lr()
257 isb(); in gicv3_enable_sre()
404 isb(); in gicv3_restore_state()
459 isb(); in gicv3_eoi_irq()
466 isb(); in gicv3_dir_irq()
815 isb(); in gicv3_cpu_init()
823 isb(); in gicv3_cpu_disable()
864 isb(); in gicv3_hyp_disable()
929 isb(); in gicv3_send_sgi_list()
941 isb(); in gicv3_send_sgi()
[all …]
A Ddomain.c127 isb(); in ctxt_switch_from()
170 isb(); in ctxt_switch_from()
232 isb(); in ctxt_switch_to()
256 isb(); in ctxt_switch_to()
261 isb(); in ctxt_switch_to()
A Dp2m.c121 isb(); in p2m_restore_state()
124 isb(); in p2m_restore_state()
127 isb(); in p2m_restore_state()
155 isb(); in p2m_flush_tlb()
163 isb(); in p2m_flush_tlb()
1468 isb(); in setup_virt_paging_one()
A Dalternative.c155 isb(); in __apply_alternatives_multi_stop()
A Dsmpboot.c358 isb(); in stop_cpu()
A Dgic.c82 isb(); in gic_save_state()
93 isb(); in gic_restore_state()
A Dtraps.c187 isb(); in init_traps()
/xen-4.10.0-shim-comet/xen/include/asm-arm/
A Dsystem.h15 #define isb() asm volatile("isb" : : : "memory") macro
A Dpage.h240 isb(); in flush_xen_data_tlb_range_va_local()
259 isb(); in flush_xen_data_tlb_range_va()
/xen-4.10.0-shim-comet/xen/arch/arm/arm32/lib/
A Dassembler.h203 isb
/xen-4.10.0-shim-comet/docs/misc/
A Dxen-command-line.markdown1604 That will cause overhead on entries and exits due to dsb/isb. However, not all
1609 dsb/isb.
1619 1. dsb/isb on all EL1 -> EL2 trap entries to categorize SErrors correctly.
1620 2. dsb/isb on EL2 -> EL1 return paths to prevent slipping hypervisor
1622 3. dsb/isb in context switch to isolate SErrors between 2 vCPUs.
1629 idle vCPU. This option will avoid most overhead of the dsb/isb, except the
1630 dsb/isb in context switch which is used to isolate the SErrors between 2
1636 of the dsb/isb pairs.

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