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Searched refs:ldr (Results 1 – 24 of 24) sorted by relevance

/xen-4.10.0-shim-comet/xen/arch/arm/arm32/
A Dhead.S102 ldr r0, =start
108 ldr r8, =_sdtb
120 ldr r0, =start
142 ldr r0, =smp_up_cpu
145 2: ldr r1, [r0]
190 ldr r1, =__bss_end
221 ldr r0, =MAIR0VAL
222 ldr r1, =MAIR1VAL
445 ldr r0, =init_data
447 ldr sp, [r0]
[all …]
A Dentry.S7 #define RESTORE_ONE_BANKED(reg) ldr r11, [sp, #UREGS_##reg]; msr reg, r11
37 ldr r11, =0xffffffff /* Clobber SP which is only valid for hypervisor frames. */
170 ldr r11, [sp, #UREGS_cpsr]
192 ldr lr, [sp, #UREGS_lr]
193 ldr r11, [sp, #UREGS_pc]
195 ldr r11, [sp, #UREGS_cpsr]
A Ddebug.S31 ldr r1, =EARLY_UART_VIRTUAL_ADDRESS /* r1 := VA UART base address */
38 ldr r1, =EARLY_UART_VIRTUAL_ADDRESS /* r1 := VA UART base address */
A Ddebug-pl011.inc34 ldr \rc, =(RXE | TXE | UARTEN) /* RXE | TXE | UARTEN */
45 ldr \rc, [\rb, #FR] /* <- UARTFR (Flag register) */
A Ddebug-8250.inc26 ldr \rc, [\rb, #(UART_LSR << EARLY_UART_REG_SHIFT)] /* Read LSR */
A Ddebug-exynos4210.inc28 ldr \rc, [\rb, #UTRSTAT] /* <- UTRSTAT (Flag register) */
/xen-4.10.0-shim-comet/xen/arch/arm/arm64/
A Dhead.S244 ldr x0, =start
250 ldr x21, =_sdtb
262 ldr x0, =start
284 ldr x0, =smp_up_cpu
287 2: ldr x1, [x0]
327 ldr x1, =__bss_end
341 ldr x0, =MAIRVAL
394 ldr x1, =boot_first
584 ldr x0, =init_data
586 ldr x0, [x0]
[all …]
A Ddebug.S31 ldr x15, =EARLY_UART_VIRTUAL_ADDRESS
38 ldr x15, =EARLY_UART_VIRTUAL_ADDRESS /* x15 := VA UART base address */
A Dentry.S62 ldr x23, [x21]
68 ldr x22, [x21]
296 ldr x21, [sp, #UREGS_PC] /* load ELR */
297 ldr w22, [sp, #UREGS_CPSR] /* load SPSR */
319 ldr lr, [sp], #(UREGS_SPSR_el1 - UREGS_LR) /* CPSR, PC, SP, LR */
437 ldr lr, [x8]
A Ddebug-pl011.inc33 ldr x\c, =0x00000301 /* RXE | TXE | UARTEN */
/xen-4.10.0-shim-comet/xen/arch/arm/arm64/lib/
A Dstrcmp.S76 ldr data1, [src1], #8
77 ldr data2, [src2], #8
96 ldr data1, [src1], #8
98 ldr data2, [src2], #8
144 ldr data1, [src1], #8
145 ldr data2, [src2], #8
167 ldr data1, [src1,pos]
168 ldr data2, [src2,pos]
177 ldr data1, [src1], #8
178 ldr data2, [src2], #8
A Dmemcmp.S74 ldr data1, [src1], #8
75 ldr data2, [src2], #8
110 ldr data1, [src1], #8
111 ldr data2, [src2], #8
177 ldr data1, [src1], #8
178 ldr data2, [src2], #8
198 ldr data1, [src1,pos]
199 ldr data2, [src2,pos]
204 ldr data1, [src1], #8
205 ldr data2, [src2], #8
A Dstrncmp.S89 ldr data1, [src1], #8
90 ldr data2, [src2], #8
132 ldr data1, [src1], #8
134 ldr data2, [src2], #8
194 ldr data1, [src1], #8
195 ldr data2, [src2], #8
222 ldr data1, [src1,pos]
223 ldr data2, [src2,pos]
232 ldr data1, [src1], #8
233 ldr data2, [src2], #8
A Dmemcpy.S83 ldr tmp1w, [src], #4
87 ldr tmp1, [src],#8
128 ldr tmp1, [src], #8
132 ldr tmp1w, [src], #4
A Dmemmove.S88 ldr tmp1w, [src, #-4]!
92 ldr tmp1, [src, #-8]!
124 ldr tmp1, [src, #-8]!
128 ldr tmp1w, [src, #-4]!
/xen-4.10.0-shim-comet/xen/arch/arm/arm32/lib/
A Dmemmove.S76 W(ldr) r3, [r1, #-4]!
77 W(ldr) r4, [r1, #-4]!
78 W(ldr) r5, [r1, #-4]!
79 W(ldr) r6, [r1, #-4]!
80 W(ldr) r7, [r1, #-4]!
81 W(ldr) r8, [r1, #-4]!
82 W(ldr) lr, [r1, #-4]!
122 ldr r3, [r1, #0]
177 ldr r3, [r1, #-4]!
A Dmemcpy.S18 W(ldr) \reg, [\ptr], #4
30 ldr\cond\()b \reg, [\ptr], #1
A Dbitops.h68 ldr r2, [r1, r0, lsl #2]
93 ldr r2, [r1, r0, lsl #2]!
A Dlib1funcs.S354 ldr lr, [sp, #4]
368 ldr lr, [sp, #4]
384 ldr pc, [sp], #8
A Dmemzero.S67 ldr lr, [sp], #4 @ 1
A Dassembler.h314 usracc ldr, \reg, \ptr, \inc, \cond, \rept, \abort
A Ddiv64.S206 ldr pc, [sp], #8
/xen-4.10.0-shim-comet/xen/include/asm-x86/hvm/
A Dvlapic.h83 uint32_t id, ldr; member
/xen-4.10.0-shim-comet/xen/arch/x86/hvm/
A Dvlapic.c1057 u32 ldr = ((id & ~0xf) << 12) | (1 << (id & 0xf)); in set_x2apic_id() local
1060 vlapic_set_reg(vlapic, APIC_LDR, ldr); in set_x2apic_id()
1451 if ( vlapic_x2apic_mode(vlapic) && id && vlapic->loaded.ldr == 1 ) in lapic_load_fixup()
1468 vlapic_set_reg(vlapic, APIC_LDR, vlapic->loaded.ldr); in lapic_load_fixup()
1530 s->loaded.ldr = vlapic_get_reg(s, APIC_LDR); in lapic_load_regs()

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