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/xen-4.10.0-shim-comet/xen/arch/x86/mm/hap/
A Dguest_walk.c29 #define _hap_gva_to_gfn(levels) hap_gva_to_gfn_##levels##_levels argument
30 #define hap_gva_to_gfn(levels) _hap_gva_to_gfn(levels) argument
32 #define _hap_p2m_ga_to_gfn(levels) hap_p2m_ga_to_gfn_##levels##_levels argument
33 #define hap_p2m_ga_to_gfn(levels) _hap_p2m_ga_to_gfn(levels) argument
/xen-4.10.0-shim-comet/tools/ocaml/libs/xentoollog/
A Dgenlevels.py8 levels = []
14 levels.append(l.split(',')[0].strip())
20 olevels = [level[4:].capitalize() for level in levels]
22 return levels, olevels
68 for index,level in enumerate(levels):
99 levels, olevels = read_levels() variable
119 cinc.write(gen_c(levels))
/xen-4.10.0-shim-comet/tools/flask/policy/policy/support/
A Dmls_macros.spt32 # Define the ordering of the sensitivity levels (least to greatest)
40 # levels from s0 to (N-1) with categories c0 to (M-1)
/xen-4.10.0-shim-comet/tools/python/xen/migration/
A Dlibxc.py296 width, levels, res1, res2 = unpack(X86_PV_INFO_FORMAT, content)
301 if levels not in (3, 4):
302 raise RecordError("Expected levels of 3 or 4, got %d" % (levels, ))
309 self.info(" %sbit guest, %d levels of pagetables" % (bitness, levels))
/xen-4.10.0-shim-comet/tools/libxc/
A Dxc_sr_restore_x86_pv.c307 (((xen_pfn_t)ctx->x86_pv.levels) << in process_vcpu_basic()
313 ctx->x86_pv.levels); in process_vcpu_basic()
328 if ( ctx->x86_pv.levels == 4 && (vcpu.x64.ctrlreg[1] & 1) ) in process_vcpu_basic()
339 (((xen_pfn_t)ctx->x86_pv.levels) << in process_vcpu_basic()
345 ctx->x86_pv.levels); in process_vcpu_basic()
646 else if ( info->pt_levels != ctx->x86_pv.levels ) in handle_x86_pv_info()
650 info->pt_levels, ctx->x86_pv.levels); in handle_x86_pv_info()
A Dxc_sr_common.h271 unsigned int levels; member
A Dxc_dom_x86.c77 unsigned levels; member
169 for ( l = domx86->params->levels - 1; l >= 0; l-- ) in count_pgtables()
172 if ( l == domx86->params->levels - 1 ) in count_pgtables()
190 if ( domx86->params->levels == PGTBL_LEVELS_I386 && in count_pgtables()
264 .levels = PGTBL_LEVELS_I386,
382 pfn_s = map->lvls[domx86->params->levels - 1].pfn; in get_pg_prot_x86()
402 for ( l = domx86->params->levels - 1; l >= 0; l-- ) in setup_pgtables_x86()
466 .levels = PGTBL_LEVELS_X86_64,
A Dxc_sr_save_x86_pv.c386 for ( level = ctx->x86_pv.levels; level > 0; level-- ) in map_p2m_list()
559 if ( ctx->x86_pv.levels == 4 && vcpu.x64.ctrlreg[1] ) in write_one_vcpu_basic()
811 .pt_levels = ctx->x86_pv.levels, in write_x86_pv_info()
897 if ( ctx->x86_pv.levels == 4 ) in normalise_pagetable()
A Dxc_sr_common_x86_pv.c90 ctx->x86_pv.levels = guest_levels; in x86_pv_domain_info()
/xen-4.10.0-shim-comet/tools/python/scripts/
A Dconvert-legacy-stream66 self.levels = 0
117 vm.width, vm.levels, 0, 0))
234 vm.levels = 4
238 vm.levels = 3
/xen-4.10.0-shim-comet/m4/
A Dax_compare_version.m420 # limited to a certain number of minor-version levels.
37 # eqN - equal up to N sub-version levels
38 # neN - not equal up to N sub-version levels
/xen-4.10.0-shim-comet/tools/console/testsuite/
A DREADME19 console code. You can verify it at various levels by invoking it in different
/xen-4.10.0-shim-comet/tools/debugger/kdd/
A Dkdd.c188 int levels, width, bits, shift, offset, i; in v2p() local
219 width = 8; levels = 4; bits = 9; in v2p()
223 width = 8; levels = 3; bits = 9; in v2p()
225 width = 4; levels = 2; bits = 10; in v2p()
228 KDD_DEBUG(s, "%i levels, va 0x%16.16"PRIx64"\n", levels, va); in v2p()
231 for (i = levels; i > 0; i--) { in v2p()
/xen-4.10.0-shim-comet/tools/flask/policy/policy/
A Dmls21 # Generate levels from all sensitivities
/xen-4.10.0-shim-comet/
A DSUPPORT.md8 for the definitions of the support status levels etc.
711 Each Status value corresponds to levels of security support,
/xen-4.10.0-shim-comet/stubdom/grub.patches/
A D60ext4.diff187 + * It's used at all the levels except the bottom.
A D61btrfs.diff422 + * don't increase a number of levels for grub-0.97!
/xen-4.10.0-shim-comet/docs/specs/
A Dlibxc-migration-stream.pandoc373 pt_levels (ptl) Number of page table levels (either 3 or 4).
/xen-4.10.0-shim-comet/docs/man/
A Dxl.cfg.pod.5.in2023 on hosts with higher levels of (physical) CPU contention.

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