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Searched refs:misc_enable (Results 1 – 2 of 2) sorted by relevance

/xen-4.10.0-shim-comet/xen/arch/x86/cpu/
A Dintel.c238 u64 misc_enable, disable; in early_init_intel() local
240 rdmsrl(MSR_IA32_MISC_ENABLE, misc_enable); in early_init_intel()
242 disable = misc_enable & (MSR_IA32_MISC_ENABLE_LIMIT_CPUID | in early_init_intel()
245 wrmsrl(MSR_IA32_MISC_ENABLE, misc_enable & ~disable); in early_init_intel()
/xen-4.10.0-shim-comet/xen/arch/x86/
A Dnmi.c344 uint64_t misc_enable; in setup_p4_watchdog() local
346 rdmsrl(MSR_IA32_MISC_ENABLE, misc_enable); in setup_p4_watchdog()
347 if (!(misc_enable & MSR_IA32_MISC_ENABLE_PERF_AVAIL)) in setup_p4_watchdog()
355 if (!(misc_enable & MSR_IA32_MISC_ENABLE_PEBS_UNAVAIL)) in setup_p4_watchdog()

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