1 #ifndef __XEN_IRQ_H__
2 #define __XEN_IRQ_H__
3
4 #include <xen/cpumask.h>
5 #include <xen/rcupdate.h>
6 #include <xen/spinlock.h>
7 #include <xen/time.h>
8 #include <xen/list.h>
9 #include <asm/regs.h>
10 #include <asm/hardirq.h>
11
12 struct irqaction {
13 void (*handler)(int, void *, struct cpu_user_regs *);
14 const char *name;
15 void *dev_id;
16 bool_t free_on_release;
17 #ifdef CONFIG_IRQ_HAS_MULTIPLE_ACTION
18 struct irqaction *next;
19 #endif
20 };
21
22 /*
23 * IRQ line status.
24 */
25 #define _IRQ_INPROGRESS 0 /* IRQ handler active - do not enter! */
26 #define _IRQ_DISABLED 1 /* IRQ disabled - do not enter! */
27 #define _IRQ_PENDING 2 /* IRQ pending - replay on enable */
28 #define _IRQ_REPLAY 3 /* IRQ has been replayed but not acked yet */
29 #define _IRQ_GUEST 4 /* IRQ is handled by guest OS(es) */
30 #define _IRQ_MOVE_PENDING 5 /* IRQ is migrating to another CPUs */
31 #define _IRQ_PER_CPU 6 /* IRQ is per CPU */
32 #define _IRQ_GUEST_EOI_PENDING 7 /* IRQ was disabled, pending a guest EOI */
33 #define _IRQF_SHARED 8 /* IRQ is shared */
34 #define IRQ_INPROGRESS (1u<<_IRQ_INPROGRESS)
35 #define IRQ_DISABLED (1u<<_IRQ_DISABLED)
36 #define IRQ_PENDING (1u<<_IRQ_PENDING)
37 #define IRQ_REPLAY (1u<<_IRQ_REPLAY)
38 #define IRQ_GUEST (1u<<_IRQ_GUEST)
39 #define IRQ_MOVE_PENDING (1u<<_IRQ_MOVE_PENDING)
40 #define IRQ_PER_CPU (1u<<_IRQ_PER_CPU)
41 #define IRQ_GUEST_EOI_PENDING (1u<<_IRQ_GUEST_EOI_PENDING)
42 #define IRQF_SHARED (1u<<_IRQF_SHARED)
43
44 /* Special IRQ numbers. */
45 #define AUTO_ASSIGN_IRQ (-1)
46 #define NEVER_ASSIGN_IRQ (-2)
47 #define FREE_TO_ASSIGN_IRQ (-3)
48
49 struct irq_desc;
50
51 /*
52 * Interrupt controller descriptor. This is all we need
53 * to describe about the low-level hardware.
54 */
55 struct hw_interrupt_type {
56 const char *typename;
57 unsigned int (*startup)(struct irq_desc *);
58 void (*shutdown)(struct irq_desc *);
59 void (*enable)(struct irq_desc *);
60 void (*disable)(struct irq_desc *);
61 void (*ack)(struct irq_desc *);
62 #ifdef CONFIG_X86
63 void (*end)(struct irq_desc *, u8 vector);
64 #else
65 void (*end)(struct irq_desc *);
66 #endif
67 void (*set_affinity)(struct irq_desc *, const cpumask_t *);
68 };
69
70 typedef const struct hw_interrupt_type hw_irq_controller;
71
72 #include <asm/irq.h>
73
74 struct msi_desc;
75 /*
76 * This is the "IRQ descriptor", which contains various information
77 * about the irq, including what kind of hardware handling it has,
78 * whether it is disabled etc etc.
79 *
80 * Note: on ARMv8 we can use normal bit manipulation functions to access
81 * the status field because struct irq_desc contains pointers, therefore
82 * the alignment of the struct is at least 8 bytes and status is the
83 * first field.
84 */
85 typedef struct irq_desc {
86 unsigned int status; /* IRQ status */
87 hw_irq_controller *handler;
88 struct msi_desc *msi_desc;
89 struct irqaction *action; /* IRQ action list */
90 int irq;
91 spinlock_t lock;
92 struct arch_irq_desc arch;
93 cpumask_var_t affinity;
94
95 /* irq ratelimit */
96 s_time_t rl_quantum_start;
97 unsigned int rl_cnt;
98 struct list_head rl_link;
99 } __cacheline_aligned irq_desc_t;
100
101 #ifndef irq_to_desc
102 #define irq_to_desc(irq) (&irq_desc[irq])
103 #endif
104
105 int init_one_irq_desc(struct irq_desc *);
106 int arch_init_one_irq_desc(struct irq_desc *);
107
108 #define irq_desc_initialized(desc) ((desc)->handler != NULL)
109
110 extern int setup_irq(unsigned int irq, unsigned int irqflags,
111 struct irqaction *);
112 extern void release_irq(unsigned int irq, const void *dev_id);
113 extern int request_irq(unsigned int irq, unsigned int irqflags,
114 void (*handler)(int, void *, struct cpu_user_regs *),
115 const char * devname, void *dev_id);
116
117 extern hw_irq_controller no_irq_type;
118 extern void no_action(int cpl, void *dev_id, struct cpu_user_regs *regs);
119 extern unsigned int irq_startup_none(struct irq_desc *);
120 extern void irq_actor_none(struct irq_desc *);
121 #define irq_shutdown_none irq_actor_none
122 #define irq_disable_none irq_actor_none
123 #define irq_enable_none irq_actor_none
124
125 struct domain;
126 struct vcpu;
127
128 struct pirq {
129 int pirq;
130 u16 evtchn;
131 bool_t masked;
132 struct rcu_head rcu_head;
133 struct arch_pirq arch;
134 };
135
136 #define pirq_info(d, p) ((struct pirq *)radix_tree_lookup(&(d)->pirq_tree, p))
137
138 /* Use this instead of pirq_info() if the structure may need allocating. */
139 extern struct pirq *pirq_get_info(struct domain *, int pirq);
140
141 #define pirq_field(d, p, f, def) ({ \
142 const struct pirq *__pi = pirq_info(d, p); \
143 __pi ? __pi->f : def; \
144 })
145 #define pirq_to_evtchn(d, pirq) pirq_field(d, pirq, evtchn, 0)
146 #define pirq_masked(d, pirq) pirq_field(d, pirq, masked, 0)
147
148 void pirq_cleanup_check(struct pirq *, struct domain *);
149
150 #define pirq_cleanup_check(pirq, d) \
151 ((pirq)->evtchn ? pirq_cleanup_check(pirq, d) : (void)0)
152
153 extern void pirq_guest_eoi(struct pirq *);
154 extern void desc_guest_eoi(struct irq_desc *, struct pirq *);
155 extern int pirq_guest_unmask(struct domain *d);
156 extern int pirq_guest_bind(struct vcpu *, struct pirq *, int will_share);
157 extern void pirq_guest_unbind(struct domain *d, struct pirq *);
158 extern void pirq_set_affinity(struct domain *d, int irq, const cpumask_t *);
159 extern irq_desc_t *domain_spin_lock_irq_desc(
160 struct domain *d, int irq, unsigned long *pflags);
161 extern irq_desc_t *pirq_spin_lock_irq_desc(
162 const struct pirq *, unsigned long *pflags);
163
set_native_irq_info(unsigned int irq,const cpumask_t * mask)164 static inline void set_native_irq_info(unsigned int irq, const cpumask_t *mask)
165 {
166 cpumask_copy(irq_to_desc(irq)->affinity, mask);
167 }
168
169 unsigned int set_desc_affinity(struct irq_desc *, const cpumask_t *);
170
171 #ifndef arch_hwdom_irqs
172 unsigned int arch_hwdom_irqs(domid_t);
173 #endif
174
175 #ifndef arch_evtchn_bind_pirq
176 void arch_evtchn_bind_pirq(struct domain *, int pirq);
177 #endif
178
179 #endif /* __XEN_IRQ_H__ */
180